bus-frequency = <0>; /* Fixed by bootwrapper */
memory-controller@2000 {
- compatible = "fsl,8540-memory-controller";
+ compatible = "fsl,mpc8540-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <0x12 0x2>;
};
L2: l2-cache-controller@20000 {
- compatible = "fsl,8540-l2-cache-controller";
+ compatible = "fsl,mpc8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <0x20>; /* 32 bytes */
cache-size = <0x40000>; /* L2, 256K */