Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[pandora-kernel.git] / arch / mn10300 / mm / cache.c
index 9261217..0a1f0aa 100644 (file)
 #include <asm/cacheflush.h>
 #include <asm/io.h>
 #include <asm/uaccess.h>
+#include <asm/smp.h>
+#include "cache-smp.h"
 
 EXPORT_SYMBOL(mn10300_icache_inv);
+EXPORT_SYMBOL(mn10300_icache_inv_range);
+EXPORT_SYMBOL(mn10300_icache_inv_range2);
+EXPORT_SYMBOL(mn10300_icache_inv_page);
 EXPORT_SYMBOL(mn10300_dcache_inv);
 EXPORT_SYMBOL(mn10300_dcache_inv_range);
 EXPORT_SYMBOL(mn10300_dcache_inv_range2);
@@ -36,96 +41,6 @@ EXPORT_SYMBOL(mn10300_dcache_flush_range2);
 EXPORT_SYMBOL(mn10300_dcache_flush_page);
 #endif
 
-/*
- * write a page back from the dcache and invalidate the icache so that we can
- * run code from it that we've just written into it
- */
-void flush_icache_page(struct vm_area_struct *vma, struct page *page)
-{
-       mn10300_dcache_flush_page(page_to_phys(page));
-       mn10300_icache_inv();
-}
-EXPORT_SYMBOL(flush_icache_page);
-
-/*
- * write some code we've just written back from the dcache and invalidate the
- * icache so that we can run that code
- */
-void flush_icache_range(unsigned long start, unsigned long end)
-{
-#ifdef CONFIG_MN10300_CACHE_WBACK
-       unsigned long addr, size, base, off;
-       struct page *page;
-       pgd_t *pgd;
-       pud_t *pud;
-       pmd_t *pmd;
-       pte_t *ppte, pte;
-
-       if (end > 0x80000000UL) {
-               /* addresses above 0xa0000000 do not go through the cache */
-               if (end > 0xa0000000UL) {
-                       end = 0xa0000000UL;
-                       if (start >= end)
-                               return;
-               }
-
-               /* kernel addresses between 0x80000000 and 0x9fffffff do not
-                * require page tables, so we just map such addresses directly */
-               base = (start >= 0x80000000UL) ? start : 0x80000000UL;
-               mn10300_dcache_flush_range(base, end);
-               if (base == start)
-                       goto invalidate;
-               end = base;
-       }
-
-       for (; start < end; start += size) {
-               /* work out how much of the page to flush */
-               off = start & (PAGE_SIZE - 1);
-
-               size = end - start;
-               if (size > PAGE_SIZE - off)
-                       size = PAGE_SIZE - off;
-
-               /* get the physical address the page is mapped to from the page
-                * tables */
-               pgd = pgd_offset(current->mm, start);
-               if (!pgd || !pgd_val(*pgd))
-                       continue;
-
-               pud = pud_offset(pgd, start);
-               if (!pud || !pud_val(*pud))
-                       continue;
-
-               pmd = pmd_offset(pud, start);
-               if (!pmd || !pmd_val(*pmd))
-                       continue;
-
-               ppte = pte_offset_map(pmd, start);
-               if (!ppte)
-                       continue;
-               pte = *ppte;
-               pte_unmap(ppte);
-
-               if (pte_none(pte))
-                       continue;
-
-               page = pte_page(pte);
-               if (!page)
-                       continue;
-
-               addr = page_to_phys(page);
-
-               /* flush the dcache and invalidate the icache coverage on that
-                * region */
-               mn10300_dcache_flush_range2(addr + off, size);
-       }
-#endif
-
-invalidate:
-       mn10300_icache_inv();
-}
-EXPORT_SYMBOL(flush_icache_range);
-
 /*
  * allow userspace to flush the instruction cache
  */