/*
-IRQ Device
+IRQ Device
00 RBTX4927-ISA/00
01 RBTX4927-ISA/01 PS2/Keyboard
02 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
16 TX4927-CP0/00 Software 0
17 TX4927-CP0/01 Software 1
18 TX4927-CP0/02 Cascade TX4927-CP0
-19 TX4927-CP0/03 Multiplexed -- do not use
-20 TX4927-CP0/04 Multiplexed -- do not use
-21 TX4927-CP0/05 Multiplexed -- do not use
-22 TX4927-CP0/06 Multiplexed -- do not use
+19 TX4927-CP0/03 Multiplexed -- do not use
+20 TX4927-CP0/04 Multiplexed -- do not use
+21 TX4927-CP0/05 Multiplexed -- do not use
+22 TX4927-CP0/06 Multiplexed -- do not use
23 TX4927-CP0/07 CPU TIMER
24 TX4927-PIC/00
25 TX4927-PIC/01
-26 TX4927-PIC/02
+26 TX4927-PIC/02
27 TX4927-PIC/03 Cascade RBTX4927-IOC
28 TX4927-PIC/04
29 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
43 TX4927-PIC/19
44 TX4927-PIC/20
45 TX4927-PIC/21
-46 TX4927-PIC/22 TX4927 PCI PCI-ERR
+46 TX4927-PIC/22 TX4927 PCI PCI-ERR
47 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
48 TX4927-PIC/24
49 TX4927-PIC/25
62 RBTX4927-IOC/06
63 RBTX4927-IOC/07
-NOTES:
+NOTES:
SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
SouthBridge/ISA/pin=0 no pci irq used by this device
SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <asm/irq.h>
#include <asm/pci.h>
#include <asm/processor.h>
-#include <asm/ptrace.h>
#include <asm/reboot.h>
#include <asm/time.h>
+#include <asm/wbflush.h>
#include <linux/bootmem.h>
#include <linux/blkdev.h>
#ifdef CONFIG_RTC_DS1742
static const u32 toshiba_rbtx4927_irq_debug_flag =
(TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO |
TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR
-// | TOSHIBA_RBTX4927_IRQ_IOC_INIT
-// | TOSHIBA_RBTX4927_IRQ_IOC_STARTUP
-// | TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN
-// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
-// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
-// | TOSHIBA_RBTX4927_IRQ_IOC_MASK
-// | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ
-// | TOSHIBA_RBTX4927_IRQ_ISA_INIT
-// | TOSHIBA_RBTX4927_IRQ_ISA_STARTUP
-// | TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN
-// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE
-// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE
-// | TOSHIBA_RBTX4927_IRQ_ISA_MASK
+// | TOSHIBA_RBTX4927_IRQ_IOC_INIT
+// | TOSHIBA_RBTX4927_IRQ_IOC_STARTUP
+// | TOSHIBA_RBTX4927_IRQ_IOC_SHUTDOWN
+// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
+// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
+// | TOSHIBA_RBTX4927_IRQ_IOC_MASK
+// | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ
+// | TOSHIBA_RBTX4927_IRQ_ISA_INIT
+// | TOSHIBA_RBTX4927_IRQ_ISA_STARTUP
+// | TOSHIBA_RBTX4927_IRQ_ISA_SHUTDOWN
+// | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE
+// | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE
+// | TOSHIBA_RBTX4927_IRQ_ISA_MASK
// | TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ
);
#endif
#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
-static struct hw_interrupt_type toshiba_rbtx4927_irq_ioc_type = {
+static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
.typename = TOSHIBA_RBTX4927_IOC_NAME,
.startup = toshiba_rbtx4927_irq_ioc_startup,
.shutdown = toshiba_rbtx4927_irq_ioc_shutdown,
#ifdef CONFIG_TOSHIBA_FPCIB0
#define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA"
-static struct hw_interrupt_type toshiba_rbtx4927_irq_isa_type = {
+static struct irq_chip toshiba_rbtx4927_irq_isa_type = {
.typename = TOSHIBA_RBTX4927_ISA_NAME,
.startup = toshiba_rbtx4927_irq_isa_startup,
.shutdown = toshiba_rbtx4927_irq_isa_shutdown,
}
//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
-#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, SA_SHIRQ, CPU_MASK_NONE, s, NULL, NULL }
+#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL }
static struct irqaction toshiba_rbtx4927_irq_ioc_action =
TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME);
#ifdef CONFIG_TOSHIBA_FPCIB0
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 3;
- irq_desc[i].handler = &toshiba_rbtx4927_irq_ioc_type;
+ irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type;
}
setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
irq_desc[i].action = 0;
irq_desc[i].depth =
((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5));
- irq_desc[i].handler = &toshiba_rbtx4927_irq_isa_type;
+ irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type;
}
setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
{
u32 i, j = 0;
for (i = 0; i < NR_IRQS; i++) {
- if (strcmp(irq_desc[i].handler->typename, "none")
+ if (strcmp(irq_desc[i].chip->typename, "none")
== 0)
continue;
if ((i >= 1)
- && (irq_desc[i - 1].handler->typename ==
- irq_desc[i].handler->typename)) {
+ && (irq_desc[i - 1].chip->typename ==
+ irq_desc[i].chip->typename)) {
j++;
} else {
j = 0;
(TOSHIBA_RBTX4927_IRQ_INFO,
"%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
key, i, i, irq_desc[i].status,
- (u32) irq_desc[i].handler,
+ (u32) irq_desc[i].chip,
(u32) irq_desc[i].action,
(u32) (irq_desc[i].action ? irq_desc[i].
action->handler : 0),
irq_desc[i].depth,
- irq_desc[i].handler->typename, j);
+ irq_desc[i].chip->typename, j);
}
}
#endif