Pull cpuidle into release branch
[pandora-kernel.git] / arch / mips / sibyte / swarm / rtc_m41t81.c
index a686bb7..26fbff4 100644 (file)
 #define M41T81REG_SQW  0x13            /* square wave register */
 
 #define M41T81_CCR_ADDRESS     0x68
-#define SMB_CSR(reg) ((u8 *) (IOADDR(A_SMB_REGISTER(1, reg))))
+
+#define SMB_CSR(reg)   IOADDR(A_SMB_REGISTER(1, reg))
 
 static int m41t81_read(uint8_t addr)
 {
-       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
 
-       bus_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD));
-       bus_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE),
-                  SMB_CSR(R_SMB_START));
+       __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD));
+       __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE,
+                    SMB_CSR(R_SMB_START));
 
-       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
 
-       bus_writeq((V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE),
-                  SMB_CSR(R_SMB_START));
+       __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
+                    SMB_CSR(R_SMB_START));
 
-       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
 
-       if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+       if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
                /* Clear error bit by writing a 1 */
-               bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+               __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
                return -1;
        }
 
-       return (bus_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
+       return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
 }
 
 static int m41t81_write(uint8_t addr, int b)
 {
-       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
 
-       bus_writeq((addr & 0xFF), SMB_CSR(R_SMB_CMD));
-       bus_writeq((b & 0xff), SMB_CSR(R_SMB_DATA));
-       bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
-                  SMB_CSR(R_SMB_START));
+       __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD));
+       __raw_writeq(b & 0xff, SMB_CSR(R_SMB_DATA));
+       __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
+                    SMB_CSR(R_SMB_START));
 
-       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
 
-       if (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
+       if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
                /* Clear error bit by writing a 1 */
-               bus_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
+               __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
                return -1;
        }
 
        /* read the same byte again to make sure it is written */
-       bus_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
-                  SMB_CSR(R_SMB_START));
+       __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
+                    SMB_CSR(R_SMB_START));
 
-       while (bus_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
+       while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
                ;
 
        return 0;
@@ -143,8 +144,10 @@ static int m41t81_write(uint8_t addr, int b)
 int m41t81_set_time(unsigned long t)
 {
        struct rtc_time tm;
+       unsigned long flags;
 
-       to_tm(t, &tm);
+       /* Note we don't care about the century */
+       rtc_time_to_tm(t, &tm);
 
        /*
         * Note the write order matters as it ensures the correctness.
@@ -152,6 +155,7 @@ int m41t81_set_time(unsigned long t)
         * believe we should finish writing min within a second.
         */
 
+       spin_lock_irqsave(&rtc_lock, flags);
        tm.tm_sec = BIN2BCD(tm.tm_sec);
        m41t81_write(M41T81REG_SC, tm.tm_sec);
 
@@ -179,6 +183,7 @@ int m41t81_set_time(unsigned long t)
        tm.tm_year %= 100;
        tm.tm_year = BIN2BCD(tm.tm_year);
        m41t81_write(M41T81REG_YR, tm.tm_year);
+       spin_unlock_irqrestore(&rtc_lock, flags);
 
        return 0;
 }
@@ -186,19 +191,23 @@ int m41t81_set_time(unsigned long t)
 unsigned long m41t81_get_time(void)
 {
        unsigned int year, mon, day, hour, min, sec;
+       unsigned long flags;
 
        /*
         * min is valid if two reads of sec are the same.
         */
        for (;;) {
+               spin_lock_irqsave(&rtc_lock, flags);
                sec = m41t81_read(M41T81REG_SC);
                min = m41t81_read(M41T81REG_MN);
                if (sec == m41t81_read(M41T81REG_SC)) break;
+               spin_unlock_irqrestore(&rtc_lock, flags);
        }
        hour = m41t81_read(M41T81REG_HR) & 0x3f;
        day = m41t81_read(M41T81REG_DT);
        mon = m41t81_read(M41T81REG_MO);
        year = m41t81_read(M41T81REG_YR);
+       spin_unlock_irqrestore(&rtc_lock, flags);
 
        sec = BCD2BIN(sec);
        min = BCD2BIN(min);