Pull cpuidle into release branch
[pandora-kernel.git] / arch / mips / sibyte / sb1250 / irq.c
index 0e6a13c..53780a1 100644 (file)
@@ -28,6 +28,7 @@
 #include <asm/errno.h>
 #include <asm/signal.h>
 #include <asm/system.h>
+#include <asm/time.h>
 #include <asm/io.h>
 
 #include <asm/sibyte/sb1250_regs.h>
@@ -61,7 +62,7 @@ static int kgdb_irq;
 
 /* Default to UART1 */
 int kgdb_port = 1;
-#ifdef CONFIG_SIBYTE_SB1250_DUART
+#ifdef CONFIG_SERIAL_SB1250_DUART
 extern char sb1250_duart_present[];
 #endif
 #endif
@@ -258,7 +259,7 @@ int sb1250_steal_irq(int irq)
        if (irq >= SB1250_NR_IRQS)
                return -EINVAL;
 
-       spin_lock_irqsave(&desc->lock,flags);
+       spin_lock_irqsave(&desc->lock, flags);
        /* Don't allow sharing at all for these */
        if (desc->action != NULL)
                retval = -EBUSY;
@@ -266,7 +267,7 @@ int sb1250_steal_irq(int irq)
                desc->action = &sb1250_dummy_action;
                desc->depth = 0;
        }
-       spin_unlock_irqrestore(&desc->lock,flags);
+       spin_unlock_irqrestore(&desc->lock, flags);
        return 0;
 }
 
@@ -359,7 +360,7 @@ void __init arch_init_irq(void)
        if (kgdb_flag) {
                kgdb_irq = K_INT_UART_0 + kgdb_port;
 
-#ifdef CONFIG_SIBYTE_SB1250_DUART
+#ifdef CONFIG_SERIAL_SB1250_DUART
                sb1250_duart_present[kgdb_port] = 0;
 #endif
                /* Setup uart 1 settings, mapper */
@@ -380,8 +381,8 @@ void __init arch_init_irq(void)
 
 #include <linux/delay.h>
 
-#define duart_out(reg, val)     csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
-#define duart_in(reg)           csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port,reg)))
+#define duart_out(reg, val)     csr_out32(val, IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
+#define duart_in(reg)           csr_in32(IOADDR(A_DUART_CHANREG(kgdb_port, reg)))
 
 static void sb1250_kgdb_interrupt(void)
 {
@@ -399,18 +400,29 @@ static void sb1250_kgdb_interrupt(void)
 
 #endif         /* CONFIG_KGDB */
 
-extern void sb1250_timer_interrupt(void);
 extern void sb1250_mailbox_interrupt(void);
 
+static inline void dispatch_ip2(void)
+{
+       unsigned int cpu = smp_processor_id();
+       unsigned long long mask;
+
+       /*
+        * Default...we've hit an IP[2] interrupt, which means we've got to
+        * check the 1250 interrupt registers to figure out what to do.  Need
+        * to detect which CPU we're on, now that smp_affinity is supported.
+        */
+       mask = __raw_readq(IOADDR(A_IMR_REGISTER(cpu,
+                                 R_IMR_INTERRUPT_STATUS_BASE)));
+       if (mask)
+               do_IRQ(fls64(mask) - 1);
+}
+
 asmlinkage void plat_irq_dispatch(void)
 {
+       unsigned int cpu = smp_processor_id();
        unsigned int pending;
 
-#ifdef CONFIG_SIBYTE_SB1250_PROF
-       /* Set compare to count to silence count/compare timer interrupts */
-       write_c0_compare(read_c0_count());
-#endif
-
        /*
         * What a pain. We have to be really careful saving the upper 32 bits
         * of any * register across function calls if we don't want them
@@ -423,14 +435,10 @@ asmlinkage void plat_irq_dispatch(void)
 
        pending = read_c0_cause() & read_c0_status() & ST0_IM;
 
-#ifdef CONFIG_SIBYTE_SB1250_PROF
-       if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */
-               sbprof_cpu_intr();
-       else
-#endif
-
-       if (pending & CAUSEF_IP4)
-               sb1250_timer_interrupt();
+       if (pending & CAUSEF_IP7) /* CPU performance counter interrupt */
+               do_IRQ(MIPS_CPU_IRQ_BASE + 7);
+       else if (pending & CAUSEF_IP4)
+               do_IRQ(K_INT_TIMER_0 + cpu);    /* sb1250_timer_interrupt() */
 
 #ifdef CONFIG_SMP
        else if (pending & CAUSEF_IP3)
@@ -442,21 +450,8 @@ asmlinkage void plat_irq_dispatch(void)
                sb1250_kgdb_interrupt();
 #endif
 
-       else if (pending & CAUSEF_IP2) {
-               unsigned long long mask;
-
-               /*
-                * Default...we've hit an IP[2] interrupt, which means we've
-                * got to check the 1250 interrupt registers to figure out what
-                * to do.  Need to detect which CPU we're on, now that
-                * smp_affinity is supported.
-                */
-               mask = __raw_readq(IOADDR(A_IMR_REGISTER(smp_processor_id(),
-                                             R_IMR_INTERRUPT_STATUS_BASE)));
-               if (mask)
-                       do_IRQ(fls64(mask) - 1);
-               else
-                       spurious_interrupt();
-       } else
+       else if (pending & CAUSEF_IP2)
+               dispatch_ip2();
+       else
                spurious_interrupt();
 }