#include <asm/mipsregs.h>
#include <asm/system.h>
-#include <asm/ptrace.h>
#include <asm/processor.h>
#include <asm/pci/bridge.h>
#include <asm/sn/addrs.h>
}
/*
- * This code is unnecessarily complex, because we do SA_INTERRUPT
+ * This code is unnecessarily complex, because we do IRQF_DISABLED
* intr enabling. Basically, once we grab the set of intrs we need
* to service, we must mask _all_ these interrupts; firstly, to make
* sure the same intr does not intr again, causing recursion that
* Kanoj 05.13.00
*/
-static void ip27_do_irq_mask0(struct pt_regs *regs)
+static void ip27_do_irq_mask0(void)
{
int irq, swlevel;
hubreg_t pend0, mask0;
struct slice_data *si = cpu_data[cpu].data;
irq = si->level_to_irq[swlevel];
- do_IRQ(irq, regs);
+ do_IRQ(irq);
}
LOCAL_HUB_L(PI_INT_PEND0);
}
-static void ip27_do_irq_mask1(struct pt_regs *regs)
+static void ip27_do_irq_mask1(void)
{
int irq, swlevel;
hubreg_t pend1, mask1;
/* "map" swlevel to irq */
irq = si->level_to_irq[swlevel];
LOCAL_HUB_CLR_INTR(swlevel);
- do_IRQ(irq, regs);
+ do_IRQ(irq);
LOCAL_HUB_L(PI_INT_PEND1);
}
-static void ip27_prof_timer(struct pt_regs *regs)
+static void ip27_prof_timer(void)
{
panic("CPU %d got a profiling interrupt", smp_processor_id());
}
-static void ip27_hub_error(struct pt_regs *regs)
+static void ip27_hub_error(void)
{
panic("CPU %d got a hub error interrupt", smp_processor_id());
}
struct bridge_controller *bc = IRQ_TO_BRIDGE(irq);
struct hub_data *hub = hub_data(cpu_to_node(bc->irq_cpu));
bridge_t *bridge = bc->base;
- struct slice_data *si = cpu_data[bc->irq_cpu].data;
int pin, swlevel;
cpuid_t cpu;
intr_disconnect_level(cpu, swlevel);
__clear_bit(swlevel, hub->irq_alloc_mask);
- si->level_to_irq[swlevel] = -1;
bridge->b_int_enable &= ~(1 << pin);
bridge->b_wid_tflush;
enable_bridge_irq(irq);
}
-static struct hw_interrupt_type bridge_irq_type = {
+static struct irq_chip bridge_irq_type = {
.typename = "bridge",
.startup = startup_bridge_irq,
.shutdown = shutdown_bridge_irq,
return irq;
}
-extern void ip27_rt_timer_interrupt(struct pt_regs *regs);
+extern void ip27_rt_timer_interrupt(void);
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
{
unsigned long pending = read_c0_cause() & read_c0_status();
if (pending & CAUSEF_IP4)
- ip27_rt_timer_interrupt(regs);
+ ip27_rt_timer_interrupt();
else if (pending & CAUSEF_IP2) /* PI_INT_PEND_0 or CC_PEND_{A|B} */
- ip27_do_irq_mask0(regs);
+ ip27_do_irq_mask0();
else if (pending & CAUSEF_IP3) /* PI_INT_PEND_1 */
- ip27_do_irq_mask1(regs);
+ ip27_do_irq_mask1();
else if (pending & CAUSEF_IP5)
- ip27_prof_timer(regs);
+ ip27_prof_timer();
else if (pending & CAUSEF_IP6)
- ip27_hub_error(regs);
+ ip27_hub_error();
}
void __init arch_init_irq(void)