Merge git://git.kernel.org/pub/scm/linux/kernel/git/sfrench/cifs-2.6

[pandora-kernel.git] / arch / mips / mips-boards / sim / sim_int.c

diff --git a/arch/mips/mips-boards/sim/sim_int.c b/arch/mips/mips-boards/sim/sim_int.c
index a4d0a2c..2ce449d 100644 (file)
--- a/arch/mips/mips-boards/sim/sim_int.c
+++ b/arch/mips/mips-boards/sim/sim_int.c
@@ -25,17 +25,66 @@
 
 extern void mips_cpu_irq_init(int);
 
-extern asmlinkage void simIRQ(void);
+static inline int clz(unsigned long x)
+{
+       __asm__ (
+       "       .set    push                                    \n"
+       "       .set    mips32                                  \n"
+       "       clz     %0, %1                                  \n"
+       "       .set    pop                                     \n"
+       : "=r" (x)
+       : "r" (x));
+
+       return x;
+}
 
-asmlinkage void sim_hw0_irqdispatch(struct pt_regs *regs)
+/*
+ * Version of ffs that only looks at bits 12..15.
+ */
+static inline unsigned int irq_ffs(unsigned int pending)
 {
-       do_IRQ(2, regs);
+#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
+       return -clz(pending) + 31 - CAUSEB_IP;
+#else
+       unsigned int a0 = 7;
+       unsigned int t0;
+
+       t0 = s0 & 0xf000;
+       t0 = t0 < 1;
+       t0 = t0 << 2;
+       a0 = a0 - t0;
+       s0 = s0 << t0;
+
+       t0 = s0 & 0xc000;
+       t0 = t0 < 1;
+       t0 = t0 << 1;
+       a0 = a0 - t0;
+       s0 = s0 << t0;
+
+       t0 = s0 & 0x8000;
+       t0 = t0 < 1;
+       //t0 = t0 << 2;
+       a0 = a0 - t0;
+       //s0 = s0 << t0;
+
+       return a0;
+#endif
 }
 
-void __init arch_init_irq(void)
+asmlinkage void plat_irq_dispatch(void)
 {
-       /* Now safe to set the exception vector. */
-       set_except_vector(0, simIRQ);
+       unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
+       int irq;
 
+       irq = irq_ffs(pending);
+
+       if (irq > 0)
+               do_IRQ(MIPSCPU_INT_BASE + irq);
+       else
+               spurious_interrupt();
+}
+
+void __init arch_init_irq(void)
+{
        mips_cpu_irq_init(MIPSCPU_INT_BASE);
 }