Pull sbs into release branch
[pandora-kernel.git] / arch / mips / kernel / entry.S
index f10b6a1..e29598a 100644 (file)
 #endif
 
 #ifndef CONFIG_PREEMPT
-       .macro  preempt_stop
-       local_irq_disable
-       .endm
 #define resume_kernel  restore_all
+#else
+#define __ret_from_irq ret_from_exception
 #endif
 
        .text
        .align  5
-FEXPORT(ret_from_irq)
-       LONG_S  s0, TI_REGS($28)
-#ifdef CONFIG_PREEMPT
-FEXPORT(ret_from_exception)
-#else
-       b       _ret_from_irq
+#ifndef CONFIG_PREEMPT
 FEXPORT(ret_from_exception)
-       preempt_stop
+       local_irq_disable                       # preempt stop
+       b       __ret_from_irq
 #endif
-FEXPORT(_ret_from_irq)
+FEXPORT(ret_from_irq)
+       LONG_S  s0, TI_REGS($28)
+FEXPORT(__ret_from_irq)
        LONG_L  t0, PT_STATUS(sp)               # returning to kernel mode?
        andi    t0, t0, KU_USER
        beqz    t0, resume_kernel
@@ -87,6 +84,7 @@ FEXPORT(restore_all)                  # restore full frame
        LONG_S  sp, TI_REGS($28)
        jal     deferred_smtc_ipi
        LONG_S  s0, TI_REGS($28)
+#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
 /* Re-arm any temporarily masked interrupts not explicitly "acked" */
        mfc0    v0, CP0_TCSTATUS
        ori     v1, v0, TCSTATUS_IXMT
@@ -113,6 +111,7 @@ FEXPORT(restore_all)                        # restore full frame
        _ehb
        xor     t0, t0, t3
        mtc0    t0, CP0_TCCONTEXT
+#endif /* CONFIG_MIPS_MT_SMTC_IM_BACKSTOP */
 #endif /* CONFIG_MIPS_MT_SMTC */
        .set    noat
        RESTORE_TEMP
@@ -124,7 +123,11 @@ FEXPORT(restore_partial)           # restore partial frame
        SAVE_AT
        SAVE_TEMP
        LONG_L  v0, PT_STATUS(sp)
-       and     v0, 1
+#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
+       and     v0, ST0_IEP
+#else
+       and     v0, ST0_IE
+#endif
        beqz    v0, 1f
        jal     trace_hardirqs_on
        b       2f