Pull sbs into release branch

[pandora-kernel.git] / arch / mips / kernel / branch.c

diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 374de83..6b5df8b 100644 (file)
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -22,7 +22,8 @@
  */
 int __compute_return_epc(struct pt_regs *regs)
 {
-       unsigned int *addr, bit, fcr31, dspcontrol;
+       unsigned int __user *addr;
+       unsigned int bit, fcr31, dspcontrol;
        long epc;
        union mips_instruction insn;
 
@@ -33,7 +34,7 @@ int __compute_return_epc(struct pt_regs *regs)
        /*
         * Read the instruction
         */
-       addr = (unsigned int *) epc;
+       addr = (unsigned int __user *) epc;
        if (__get_user(insn.word, addr)) {
                force_sig(SIGSEGV, current);
                return -EFAULT;
@@ -178,13 +179,13 @@ int __compute_return_epc(struct pt_regs *regs)
                if (is_fpu_owner())
                        asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
                else
-                       fcr31 = current->thread.fpu.hard.fcr31;
+                       fcr31 = current->thread.fpu.fcr31;
                preempt_enable();
 
                bit = (insn.i_format.rt >> 2);
                bit += (bit != 0);
                bit += 23;
-               switch (insn.i_format.rt) {
+               switch (insn.i_format.rt & 3) {
                case 0: /* bc1f */
                case 2: /* bc1fl */
                        if (~fcr31 & (1 << bit))