Merge branch 'for-linus' of git://git.infradead.org/users/eparis/notify

[pandora-kernel.git] / arch / mips / include / asm / cpu.h

diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index b201a8f..06d59dc 100644 (file)
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -111,14 +111,16 @@
  * These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
  */
 
-#define PRID_IMP_BCM4710       0x4000
-#define PRID_IMP_BCM3302       0x9000
-#define PRID_IMP_BCM6338       0x9000
-#define PRID_IMP_BCM6345       0x8000
-#define PRID_IMP_BCM6348       0x9100
-#define PRID_IMP_BCM4350       0xA000
-#define PRID_REV_BCM6358       0x0010
-#define PRID_REV_BCM6368       0x0030
+#define PRID_IMP_BMIPS4KC      0x4000
+#define PRID_IMP_BMIPS32       0x8000
+#define PRID_IMP_BMIPS3300     0x9000
+#define PRID_IMP_BMIPS3300_ALT 0x9100
+#define PRID_IMP_BMIPS3300_BUG 0x0000
+#define PRID_IMP_BMIPS43XX     0xa000
+#define PRID_IMP_BMIPS5000     0x5a00
+
+#define PRID_REV_BMIPS4380_LO  0x0040
+#define PRID_REV_BMIPS4380_HI  0x006f
 
 /*
  * These are the PRID's for when 23:16 == PRID_COMP_CAVIUM
@@ -131,6 +133,7 @@
 #define PRID_IMP_CAVIUM_CN56XX 0x0400
 #define PRID_IMP_CAVIUM_CN50XX 0x0600
 #define PRID_IMP_CAVIUM_CN52XX 0x0700
+#define PRID_IMP_CAVIUM_CN63XX 0x9000
 
 /*
  * These are the PRID's for when 23:16 == PRID_COMP_INGENIC
@@ -223,15 +226,14 @@ enum cpu_type_enum {
         * MIPS32 class processors
         */
        CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
-       CPU_ALCHEMY, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
-       CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358,
-       CPU_JZRISC,
+       CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350,
+       CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC,
 
        /*
         * MIPS64 class processors
         */
        CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
-       CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS,
+       CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2,
 
        CPU_LAST
 };