Merge branch 'syscore' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/suspen...
[pandora-kernel.git] / arch / m32r / platforms / oaks32r / setup.c
index 19a02db..83b46b0 100644 (file)
@@ -74,39 +74,39 @@ void __init init_IRQ(void)
 
 #ifdef CONFIG_NE2000
        /* INT3 : LAN controller (RTL8019AS) */
-       set_irq_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type,
+       irq_set_chip_and_handler(M32R_IRQ_INT3, &oaks32r_irq_type,
                                 handle_level_irq);
        icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
        disable_oaks32r_irq(M32R_IRQ_INT3);
 #endif /* CONFIG_M32R_NE2000 */
 
        /* MFT2 : system timer */
-       set_irq_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type,
+       irq_set_chip_and_handler(M32R_IRQ_MFT2, &oaks32r_irq_type,
                                 handle_level_irq);
        icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
        disable_oaks32r_irq(M32R_IRQ_MFT2);
 
 #ifdef CONFIG_SERIAL_M32R_SIO
        /* SIO0_R : uart receive data */
-       set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type,
+       irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &oaks32r_irq_type,
                                 handle_level_irq);
        icu_data[M32R_IRQ_SIO0_R].icucr = 0;
        disable_oaks32r_irq(M32R_IRQ_SIO0_R);
 
        /* SIO0_S : uart send data */
-       set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type,
+       irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &oaks32r_irq_type,
                                 handle_level_irq);
        icu_data[M32R_IRQ_SIO0_S].icucr = 0;
        disable_oaks32r_irq(M32R_IRQ_SIO0_S);
 
        /* SIO1_R : uart receive data */
-       set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type,
+       irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &oaks32r_irq_type,
                                 handle_level_irq);
        icu_data[M32R_IRQ_SIO1_R].icucr = 0;
        disable_oaks32r_irq(M32R_IRQ_SIO1_R);
 
        /* SIO1_S : uart send data */
-       set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type,
+       irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &oaks32r_irq_type,
                                 handle_level_irq);
        icu_data[M32R_IRQ_SIO1_S].icucr = 0;
        disable_oaks32r_irq(M32R_IRQ_SIO1_S);