Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq

[pandora-kernel.git] / arch / m32r / mm / cache.c

diff --git a/arch/m32r/mm/cache.c b/arch/m32r/mm/cache.c
index c6f72a6..fac7595 100644 (file)
--- a/arch/m32r/mm/cache.c
+++ b/arch/m32r/mm/cache.c
@@ -1,15 +1,15 @@
 /*
  *  linux/arch/m32r/mm/cache.c
  *
- *  Copyright (C) 2002  Hirokazu Takata
+ *  Copyright (C) 2002-2005  Hirokazu Takata, Hayato Fujiwara
  */
 
-#include <linux/config.h>
 #include <asm/pgtable.h>
 
 #undef MCCR
 
-#if defined(CONFIG_CHIP_XNUX2) || defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_OPSP)
+#if defined(CONFIG_CHIP_XNUX2) || defined(CONFIG_CHIP_M32700) \
+       || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_OPSP)
 /* Cache Control Register */
 #define MCCR           ((volatile unsigned long*)0xfffffffc)
 #define MCCR_CC                (1UL << 7)      /* Cache mode modify bit */
@@ -27,7 +27,7 @@
 #define MCCR_IIV       (1UL << 0)      /* I-cache invalidate */
 #define MCCR_ICACHE_INV                MCCR_IIV
 #elif defined(CONFIG_CHIP_M32104)
-#define MCCR           ((volatile unsigned long*)0xfffffffc)
+#define MCCR           ((volatile unsigned short*)0xfffffffe)
 #define MCCR_IIV       (1UL << 8)      /* I-cache invalidate */
 #define MCCR_DIV       (1UL << 9)      /* D-cache invalidate */
 #define MCCR_DCB       (1UL << 10)     /* D-cache copy back */
@@ -36,7 +36,7 @@
 #define MCCR_ICACHE_INV                MCCR_IIV
 #define MCCR_DCACHE_CB         MCCR_DCB
 #define MCCR_DCACHE_CBINV      (MCCR_DIV|MCCR_DCB)
-#endif /* CONFIG_CHIP_XNUX2 || CONFIG_CHIP_M32700 */
+#endif
 
 #ifndef MCCR
 #error Unknown cache type.
@@ -47,29 +47,42 @@
 void _flush_cache_all(void)
 {
 #if defined(CONFIG_CHIP_M32102)
+       unsigned char mccr;
        *MCCR = MCCR_ICACHE_INV;
+#elif defined(CONFIG_CHIP_M32104)
+       unsigned short mccr;
+
+       /* Copyback and invalidate D-cache */
+       /* Invalidate I-cache */
+       *MCCR |= (MCCR_ICACHE_INV | MCCR_DCACHE_CBINV);
 #else
        unsigned long mccr;
 
        /* Copyback and invalidate D-cache */
        /* Invalidate I-cache */
        *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CBINV;
-       while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */
 #endif
+       while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */
 }
 
 /* Copy back D-cache and invalidate I-cache all */
 void _flush_cache_copyback_all(void)
 {
 #if defined(CONFIG_CHIP_M32102)
+       unsigned char mccr;
        *MCCR = MCCR_ICACHE_INV;
+#elif defined(CONFIG_CHIP_M32104)
+       unsigned short mccr;
+
+       /* Copyback and invalidate D-cache */
+       /* Invalidate I-cache */
+       *MCCR |= (MCCR_ICACHE_INV | MCCR_DCACHE_CB);
 #else
        unsigned long mccr;
 
        /* Copyback D-cache */
        /* Invalidate I-cache */
        *MCCR = MCCR_ICACHE_INV | MCCR_DCACHE_CB;
-       while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */
-
 #endif
+       while ((mccr = *MCCR) & MCCR_IIV); /* loop while invalidating... */
 }