Merge branches 'x86-fixes-for-linus', 'sched-fixes-for-linus', 'timers-fixes-for...

[pandora-kernel.git] / arch / ia64 / sn / kernel / irq.c

diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
index 79ef3d0..81a1f4e 100644 (file)
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -109,7 +109,7 @@ static void sn_ack_irq(struct irq_data *data)
        HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask);
        __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
 
-       move_native_irq(irq);
+       irq_move_irq(data);
 }
 
 static void sn_irq_info_free(struct rcu_head *head);
@@ -227,7 +227,7 @@ void sn_set_err_irq_affinity(unsigned int irq)
 {
         /*
          * On systems which support CPU disabling (SHub2), all error interrupts
-         * are targetted at the boot CPU.
+         * are targeted at the boot CPU.
          */
         if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT))
                 set_irq_affinity_info(irq, cpu_physical_id(0), 0);
@@ -273,15 +273,13 @@ unsigned int sn_local_vector_to_irq(u8 vector)
 void sn_irq_init(void)
 {
        int i;
-       struct irq_desc *base_desc = irq_desc;
 
        ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR;
        ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
 
        for (i = 0; i < NR_IRQS; i++) {
-               if (base_desc[i].chip == &no_irq_chip) {
-                       base_desc[i].chip = &irq_type_sn;
-               }
+               if (irq_get_chip(i) == &no_irq_chip)
+                       irq_set_chip(i, &irq_type_sn);
        }
 }
 
@@ -355,7 +353,6 @@ void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
        int cpu = nasid_slice_to_cpuid(nasid, slice);
 #ifdef CONFIG_SMP
        int cpuphys;
-       struct irq_desc *desc;
 #endif
 
        pci_dev_get(pci_dev);
@@ -372,12 +369,11 @@ void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
 #ifdef CONFIG_SMP
        cpuphys = cpu_physical_id(cpu);
        set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0);
-       desc = irq_to_desc(sn_irq_info->irq_irq);
        /*
         * Affinity was set by the PROM, prevent it from
         * being reset by the request_irq() path.
         */
-       desc->status |= IRQ_AFFINITY_SET;
+       irqd_mark_affinity_was_set(irq_get_irq_data(sn_irq_info->irq_irq));
 #endif
 }
 
@@ -416,7 +412,7 @@ sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
        pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
 
        /* Don't force an interrupt if the irq has been disabled */
-       if (!(irq_desc[sn_irq_info->irq_irq].status & IRQ_DISABLED) &&
+       if (!irqd_irq_disabled(irq_get_irq_data(sn_irq_info->irq_irq)) &&
            pci_provider && pci_provider->force_interrupt)
                (*pci_provider->force_interrupt)(sn_irq_info);
 }
@@ -439,7 +435,7 @@ static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
        /*
         * Bridge types attached to TIO (anything but PIC) do not need this WAR
         * since they do not target Shub II interrupt registers.  If that
-        * ever changes, this check needs to accomodate.
+        * ever changes, this check needs to accommodate.
         */
        if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
                return;