[PATCH] 64bit resource: change pci core and arch code to use resource_size_t

[pandora-kernel.git] / arch / i386 / pci / i386.c

diff --git a/arch/i386/pci/i386.c b/arch/i386/pci/i386.c
index 93a364c..10154a2 100644 (file)
--- a/arch/i386/pci/i386.c
+++ b/arch/i386/pci/i386.c
@@ -48,10 +48,10 @@
  */
 void
 pcibios_align_resource(void *data, struct resource *res,
-                      unsigned long size, unsigned long align)
+                       resource_size_t size, resource_size_t align)
 {
        if (res->flags & IORESOURCE_IO) {
-               unsigned long start = res->start;
+               resource_size_t start = res->start;
 
                if (start & 0x300) {
                        start = (start + 0x3ff) & ~0x3ff;
@@ -170,43 +170,26 @@ static void __init pcibios_allocate_resources(int pass)
 static int __init pcibios_assign_resources(void)
 {
        struct pci_dev *dev = NULL;
-       int idx;
-       struct resource *r;
-
-       for_each_pci_dev(dev) {
-               int class = dev->class >> 8;
-
-               /* Don't touch classless devices and host bridges */
-               if (!class || class == PCI_CLASS_BRIDGE_HOST)
-                       continue;
-
-               for(idx=0; idx<6; idx++) {
-                       r = &dev->resource[idx];
-
-                       /*
-                        *  Don't touch IDE controllers and I/O ports of video cards!
-                        */
-                       if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) ||
-                           (class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO)))
-                               continue;
-
-                       /*
-                        *  We shall assign a new address to this resource, either because
-                        *  the BIOS forgot to do so or because we have decided the old
-                        *  address was unusable for some reason.
-                        */
-                       if (!r->start && r->end)
-                               pci_assign_resource(dev, idx);
-               }
+       struct resource *r, *pr;
 
-               if (pci_probe & PCI_ASSIGN_ROMS) {
+       if (!(pci_probe & PCI_ASSIGN_ROMS)) {
+               /* Try to use BIOS settings for ROMs, otherwise let
+                  pci_assign_unassigned_resources() allocate the new
+                  addresses. */
+               for_each_pci_dev(dev) {
                        r = &dev->resource[PCI_ROM_RESOURCE];
-                       r->end -= r->start;
-                       r->start = 0;
-                       if (r->end)
-                               pci_assign_resource(dev, PCI_ROM_RESOURCE);
+                       if (!r->flags || !r->start)
+                               continue;
+                       pr = pci_find_parent_resource(dev, r);
+                       if (!pr || request_resource(pr, r) < 0) {
+                               r->end -= r->start;
+                               r->start = 0;
+                       }
                }
        }
+
+       pci_assign_unassigned_resources();
+
        return 0;
 }
 
@@ -238,6 +221,11 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask)
                        continue;
 
                r = &dev->resource[idx];
+               if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
+                       continue;
+               if ((idx == PCI_ROM_RESOURCE) &&
+                               (!(r->flags & IORESOURCE_ROM_ENABLE)))
+                       continue;
                if (!r->start && r->end) {
                        printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
                        return -EINVAL;
@@ -247,8 +235,6 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask)
                if (r->flags & IORESOURCE_MEM)
                        cmd |= PCI_COMMAND_MEMORY;
        }
-       if (dev->resource[PCI_ROM_RESOURCE].start)
-               cmd |= PCI_COMMAND_MEMORY;
        if (cmd != old_cmd) {
                printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
                pci_write_config_word(dev, PCI_COMMAND, cmd);
@@ -256,6 +242,15 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask)
        return 0;
 }
 
+void pcibios_disable_resources(struct pci_dev *dev)
+{
+       u16 cmd;
+
+       pci_read_config_word(dev, PCI_COMMAND, &cmd);
+       cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
+       pci_write_config_word(dev, PCI_COMMAND, cmd);
+}
+
 /*
  *  If we set up a device for bus mastering, we need to check the latency
  *  timer as certain crappy BIOSes forget to set it properly.
@@ -290,8 +285,6 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
        /* Leave vm_pgoff as-is, the PCI space address is the physical
         * address on this platform.
         */
-       vma->vm_flags |= (VM_SHM | VM_LOCKED | VM_IO);
-
        prot = pgprot_val(vma->vm_page_prot);
        if (boot_cpu_data.x86 > 3)
                prot |= _PAGE_PCD | _PAGE_PWT;
@@ -300,9 +293,9 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
        /* Write-combine setting is ignored, it is changed via the mtrr
         * interfaces on this platform.
         */
-       if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
-                            vma->vm_end - vma->vm_start,
-                            vma->vm_page_prot))
+       if (io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+                              vma->vm_end - vma->vm_start,
+                              vma->vm_page_prot))
                return -EAGAIN;
 
        return 0;