Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[pandora-kernel.git] / arch / i386 / oprofile / op_model_athlon.c
index 693bdea..3057a19 100644 (file)
 #define NUM_COUNTERS 4
 #define NUM_CONTROLS 4
 
+#define CTR_IS_RESERVED(msrs,c) (msrs->counters[(c)].addr ? 1 : 0)
 #define CTR_READ(l,h,msrs,c) do {rdmsr(msrs->counters[(c)].addr, (l), (h));} while (0)
 #define CTR_WRITE(l,msrs,c) do {wrmsr(msrs->counters[(c)].addr, -(unsigned int)(l), -1);} while (0)
 #define CTR_OVERFLOWED(n) (!((n) & (1U<<31)))
 
+#define CTRL_IS_RESERVED(msrs,c) (msrs->controls[(c)].addr ? 1 : 0)
 #define CTRL_READ(l,h,msrs,c) do {rdmsr(msrs->controls[(c)].addr, (l), (h));} while (0)
 #define CTRL_WRITE(l,h,msrs,c) do {wrmsr(msrs->controls[(c)].addr, (l), (h));} while (0)
 #define CTRL_SET_ACTIVE(n) (n |= (1<<22))
@@ -40,15 +42,21 @@ static unsigned long reset_value[NUM_COUNTERS];
  
 static void athlon_fill_in_addresses(struct op_msrs * const msrs)
 {
-       msrs->counters[0].addr = MSR_K7_PERFCTR0;
-       msrs->counters[1].addr = MSR_K7_PERFCTR1;
-       msrs->counters[2].addr = MSR_K7_PERFCTR2;
-       msrs->counters[3].addr = MSR_K7_PERFCTR3;
-
-       msrs->controls[0].addr = MSR_K7_EVNTSEL0;
-       msrs->controls[1].addr = MSR_K7_EVNTSEL1;
-       msrs->controls[2].addr = MSR_K7_EVNTSEL2;
-       msrs->controls[3].addr = MSR_K7_EVNTSEL3;
+       int i;
+
+       for (i=0; i < NUM_COUNTERS; i++) {
+               if (reserve_perfctr_nmi(MSR_K7_PERFCTR0 + i))
+                       msrs->counters[i].addr = MSR_K7_PERFCTR0 + i;
+               else
+                       msrs->counters[i].addr = 0;
+       }
+
+       for (i=0; i < NUM_CONTROLS; i++) {
+               if (reserve_evntsel_nmi(MSR_K7_EVNTSEL0 + i))
+                       msrs->controls[i].addr = MSR_K7_EVNTSEL0 + i;
+               else
+                       msrs->controls[i].addr = 0;
+       }
 }
 
  
@@ -59,19 +67,23 @@ static void athlon_setup_ctrs(struct op_msrs const * const msrs)
  
        /* clear all counters */
        for (i = 0 ; i < NUM_CONTROLS; ++i) {
+               if (unlikely(!CTRL_IS_RESERVED(msrs,i)))
+                       continue;
                CTRL_READ(low, high, msrs, i);
                CTRL_CLEAR(low);
                CTRL_WRITE(low, high, msrs, i);
        }
-       
+
        /* avoid a false detection of ctr overflows in NMI handler */
        for (i = 0; i < NUM_COUNTERS; ++i) {
+               if (unlikely(!CTR_IS_RESERVED(msrs,i)))
+                       continue;
                CTR_WRITE(1, msrs, i);
        }
 
        /* enable active counters */
        for (i = 0; i < NUM_COUNTERS; ++i) {
-               if (counter_config[i].enabled) {
+               if ((counter_config[i].enabled) && (CTR_IS_RESERVED(msrs,i))) {
                        reset_value[i] = counter_config[i].count;
 
                        CTR_WRITE(counter_config[i].count, msrs, i);
@@ -98,6 +110,8 @@ static int athlon_check_ctrs(struct pt_regs * const regs,
        int i;
 
        for (i = 0 ; i < NUM_COUNTERS; ++i) {
+               if (!reset_value[i])
+                       continue;
                CTR_READ(low, high, msrs, i);
                if (CTR_OVERFLOWED(low)) {
                        oprofile_add_sample(regs, i);
@@ -132,12 +146,27 @@ static void athlon_stop(struct op_msrs const * const msrs)
        /* Subtle: stop on all counters to avoid race with
         * setting our pm callback */
        for (i = 0 ; i < NUM_COUNTERS ; ++i) {
+               if (!reset_value[i])
+                       continue;
                CTRL_READ(low, high, msrs, i);
                CTRL_SET_INACTIVE(low);
                CTRL_WRITE(low, high, msrs, i);
        }
 }
 
+static void athlon_shutdown(struct op_msrs const * const msrs)
+{
+       int i;
+
+       for (i = 0 ; i < NUM_COUNTERS ; ++i) {
+               if (CTR_IS_RESERVED(msrs,i))
+                       release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
+       }
+       for (i = 0 ; i < NUM_CONTROLS ; ++i) {
+               if (CTRL_IS_RESERVED(msrs,i))
+                       release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
+       }
+}
 
 struct op_x86_model_spec const op_athlon_spec = {
        .num_counters = NUM_COUNTERS,
@@ -146,5 +175,6 @@ struct op_x86_model_spec const op_athlon_spec = {
        .setup_ctrs = &athlon_setup_ctrs,
        .check_ctrs = &athlon_check_ctrs,
        .start = &athlon_start,
-       .stop = &athlon_stop
+       .stop = &athlon_stop,
+       .shutdown = &athlon_shutdown
 };