Pull cpuidle into release branch

[pandora-kernel.git] / arch / cris / arch-v32 / kernel / time.c

diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c
index d48e397..2f7e8e2 100644 (file)
--- a/arch/cris/arch-v32/kernel/time.c
+++ b/arch/cris/arch-v32/kernel/time.c
@@ -6,7 +6,6 @@
  *
  */
 
-#include <linux/config.h>
 #include <linux/timex.h>
 #include <linux/time.h>
 #include <linux/jiffies.h>
@@ -100,7 +99,7 @@ unsigned long do_slow_gettimeoffset(void)
 /* From timer MDS describing the hardware watchdog:
  * 4.3.1 Watchdog Operation
  * The watchdog timer is an 8-bit timer with a configurable start value.
- * Once started the whatchdog counts downwards with a frequency of 763 Hz
+ * Once started the watchdog counts downwards with a frequency of 763 Hz
  * (100/131072 MHz). When the watchdog counts down to 1, it generates an
  * NMI (Non Maskable Interrupt), and when it counts down to 0, it resets the
  * chip.
@@ -220,7 +219,7 @@ timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
                return IRQ_HANDLED;
 
        /* call the real timer interrupt handler */
-       do_timer(regs);
+       do_timer(1);
 
        /*
         * If we have an externally synchronized Linux clock, then update
@@ -242,12 +241,16 @@ timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
         return IRQ_HANDLED;
 }
 
-/* timer is SA_SHIRQ so drivers can add stuff to the timer irq chain
- * it needs to be SA_INTERRUPT to make the jiffies update work properly
+/* timer is IRQF_SHARED so drivers can add stuff to the timer irq chain
+ * it needs to be IRQF_DISABLED to make the jiffies update work properly
  */
 
-static struct irqaction irq_timer  = { timer_interrupt, SA_SHIRQ | SA_INTERRUPT,
-                                 CPU_MASK_NONE, "timer", NULL, NULL};
+static struct irqaction irq_timer  = {
+       .mask = timer_interrupt,
+       .flags = IRQF_SHARED | IRQF_DISABLED,
+       .mask = CPU_MASK_NONE,
+       .name = "timer"
+};
 
 void __init
 cris_timer_init(void)