Merge branch 'upstream/wm8974' into for-2.6.33
[pandora-kernel.git] / arch / blackfin / mach-bf561 / include / mach / mem_map.h
index f1d4c06..a63e15c 100644 (file)
@@ -1,13 +1,16 @@
 /*
- * Memory MAP
- * Common header file for blackfin BF561 of processors.
+ * BF561 memory map
+ *
+ * Copyright 2004-2009 Analog Devices Inc.
+ * Licensed under the GPL-2 or later.
  */
 
-#ifndef _MEM_MAP_561_H_
-#define _MEM_MAP_561_H_
+#ifndef __BFIN_MACH_MEM_MAP_H__
+#define __BFIN_MACH_MEM_MAP_H__
 
-#define COREMMR_BASE           0xFFE00000       /* Core MMRs */
-#define SYSMMR_BASE            0xFFC00000       /* System MMRs */
+#ifndef __BFIN_MEM_MAP_H__
+# error "do not include mach/mem_map.h directly -- use asm/mem_map.h"
+#endif
 
 /* Async Memory Banks */
 #define ASYNC_BANK3_BASE       0x2C000000       /* Async Bank 3 */
 #define COREA_L1_SCRATCH_START 0xFFB00000
 #define COREB_L1_SCRATCH_START 0xFF700000
 
-#define L1_SCRATCH_START       COREA_L1_SCRATCH_START
-#define L1_SCRATCH_LENGTH      0x1000
+#ifdef __ASSEMBLY__
 
-#endif                         /* _MEM_MAP_533_H_ */
+/*
+ * The following macros both return the address of the PDA for the
+ * current core.
+ *
+ * In its first safe (and hairy) form, the macro neither clobbers any
+ * register aside of the output Preg, nor uses the stack, since it
+ * could be called with an invalid stack pointer, or the current stack
+ * space being uncovered by any CPLB (e.g. early exception handling).
+ *
+ * The constraints on the second form are a bit relaxed, and the code
+ * is allowed to use the specified Dreg for determining the PDA
+ * address to be returned into Preg.
+ */
+#ifdef CONFIG_SMP
+#define GET_PDA_SAFE(preg)             \
+       preg.l = lo(DSPID);             \
+       preg.h = hi(DSPID);             \
+       preg = [preg];                  \
+       preg = preg << 2;               \
+       preg = preg << 2;               \
+       preg = preg << 2;               \
+       preg = preg << 2;               \
+       preg = preg << 2;               \
+       preg = preg << 2;               \
+       preg = preg << 2;               \
+       preg = preg << 2;               \
+       preg = preg << 2;               \
+       preg = preg << 2;               \
+       preg = preg << 2;               \
+       preg = preg << 2;               \
+       if cc jump 2f;                  \
+       cc = preg == 0x0;               \
+       preg.l = _cpu_pda;              \
+       preg.h = _cpu_pda;              \
+       if !cc jump 3f;                 \
+1:                                     \
+       /* preg = 0x0; */               \
+       cc = !cc; /* restore cc to 0 */ \
+       jump 4f;                        \
+2:                                     \
+       cc = preg == 0x0;               \
+       preg.l = _cpu_pda;              \
+       preg.h = _cpu_pda;              \
+       if cc jump 4f;                  \
+       /* preg = 0x1000000; */         \
+       cc = !cc; /* restore cc to 1 */ \
+3:                                     \
+       preg = [preg];                  \
+4:
+
+#define GET_PDA(preg, dreg)            \
+       preg.l = lo(DSPID);             \
+       preg.h = hi(DSPID);             \
+       dreg = [preg];                  \
+       preg.l = _cpu_pda;              \
+       preg.h = _cpu_pda;              \
+       cc = bittst(dreg, 0);           \
+       if !cc jump 1f;                 \
+       preg = [preg];                  \
+1:                                     \
+
+#define GET_CPUID(preg, dreg)          \
+       preg.l = lo(DSPID);             \
+       preg.h = hi(DSPID);             \
+       dreg = [preg];                  \
+       dreg = ROT dreg BY -1;          \
+       dreg = CC;
+
+static inline unsigned long get_l1_scratch_start_cpu(int cpu)
+{
+       return cpu ? COREB_L1_SCRATCH_START : COREA_L1_SCRATCH_START;
+}
+static inline unsigned long get_l1_code_start_cpu(int cpu)
+{
+       return cpu ? COREB_L1_CODE_START : COREA_L1_CODE_START;
+}
+static inline unsigned long get_l1_data_a_start_cpu(int cpu)
+{
+       return cpu ? COREB_L1_DATA_A_START : COREA_L1_DATA_A_START;
+}
+static inline unsigned long get_l1_data_b_start_cpu(int cpu)
+{
+       return cpu ? COREB_L1_DATA_B_START : COREA_L1_DATA_B_START;
+}
+
+static inline unsigned long get_l1_scratch_start(void)
+{
+       return get_l1_scratch_start_cpu(blackfin_core_id());
+}
+static inline unsigned long get_l1_code_start(void)
+{
+       return get_l1_code_start_cpu(blackfin_core_id());
+}
+static inline unsigned long get_l1_data_a_start(void)
+{
+       return get_l1_data_a_start_cpu(blackfin_core_id());
+}
+static inline unsigned long get_l1_data_b_start(void)
+{
+       return get_l1_data_b_start_cpu(blackfin_core_id());
+}
+
+#endif /* CONFIG_SMP */
+
+#endif /* __ASSEMBLY__ */
+
+#endif