Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

[pandora-kernel.git] / arch / blackfin / mach-bf518 / include / mach / cdefBF51x_base.h

diff --git a/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h b/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h
index e548e9d..e16969f 100644 (file)
--- a/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h
+++ b/arch/blackfin/mach-bf518/include/mach/cdefBF51x_base.h
@@ -262,14 +262,14 @@
 #define bfin_write_SPORT0_TX(val)              bfin_write32(SPORT0_TX, val)
 #define bfin_read_SPORT0_RX()                  bfin_read32(SPORT0_RX)
 #define bfin_write_SPORT0_RX(val)              bfin_write32(SPORT0_RX, val)
-#define bfin_read_SPORT0_TX32()                        bfin_read32(SPORT0_TX32)
-#define bfin_write_SPORT0_TX32(val)            bfin_write32(SPORT0_TX32, val)
-#define bfin_read_SPORT0_RX32()                        bfin_read32(SPORT0_RX32)
-#define bfin_write_SPORT0_RX32(val)            bfin_write32(SPORT0_RX32, val)
-#define bfin_read_SPORT0_TX16()                        bfin_read16(SPORT0_TX16)
-#define bfin_write_SPORT0_TX16(val)            bfin_write16(SPORT0_TX16, val)
-#define bfin_read_SPORT0_RX16()                        bfin_read16(SPORT0_RX16)
-#define bfin_write_SPORT0_RX16(val)            bfin_write16(SPORT0_RX16, val)
+#define bfin_read_SPORT0_TX32()                        bfin_read32(SPORT0_TX)
+#define bfin_write_SPORT0_TX32(val)            bfin_write32(SPORT0_TX, val)
+#define bfin_read_SPORT0_RX32()                        bfin_read32(SPORT0_RX)
+#define bfin_write_SPORT0_RX32(val)            bfin_write32(SPORT0_RX, val)
+#define bfin_read_SPORT0_TX16()                        bfin_read16(SPORT0_TX)
+#define bfin_write_SPORT0_TX16(val)            bfin_write16(SPORT0_TX, val)
+#define bfin_read_SPORT0_RX16()                        bfin_read16(SPORT0_RX)
+#define bfin_write_SPORT0_RX16(val)            bfin_write16(SPORT0_RX, val)
 #define bfin_read_SPORT0_RCR1()                        bfin_read16(SPORT0_RCR1)
 #define bfin_write_SPORT0_RCR1(val)            bfin_write16(SPORT0_RCR1, val)
 #define bfin_read_SPORT0_RCR2()                        bfin_read16(SPORT0_RCR2)
@@ -317,14 +317,14 @@
 #define bfin_write_SPORT1_TX(val)              bfin_write32(SPORT1_TX, val)
 #define bfin_read_SPORT1_RX()                  bfin_read32(SPORT1_RX)
 #define bfin_write_SPORT1_RX(val)              bfin_write32(SPORT1_RX, val)
-#define bfin_read_SPORT1_TX32()                        bfin_read32(SPORT1_TX32)
-#define bfin_write_SPORT1_TX32(val)            bfin_write32(SPORT1_TX32, val)
-#define bfin_read_SPORT1_RX32()                        bfin_read32(SPORT1_RX32)
-#define bfin_write_SPORT1_RX32(val)            bfin_write32(SPORT1_RX32, val)
-#define bfin_read_SPORT1_TX16()                        bfin_read16(SPORT1_TX16)
-#define bfin_write_SPORT1_TX16(val)            bfin_write16(SPORT1_TX16, val)
-#define bfin_read_SPORT1_RX16()                        bfin_read16(SPORT1_RX16)
-#define bfin_write_SPORT1_RX16(val)            bfin_write16(SPORT1_RX16, val)
+#define bfin_read_SPORT1_TX32()                        bfin_read32(SPORT1_TX)
+#define bfin_write_SPORT1_TX32(val)            bfin_write32(SPORT1_TX, val)
+#define bfin_read_SPORT1_RX32()                        bfin_read32(SPORT1_RX)
+#define bfin_write_SPORT1_RX32(val)            bfin_write32(SPORT1_RX, val)
+#define bfin_read_SPORT1_TX16()                        bfin_read16(SPORT1_TX)
+#define bfin_write_SPORT1_TX16(val)            bfin_write16(SPORT1_TX, val)
+#define bfin_read_SPORT1_RX16()                        bfin_read16(SPORT1_RX)
+#define bfin_write_SPORT1_RX16(val)            bfin_write16(SPORT1_RX, val)
 #define bfin_read_SPORT1_RCR1()                        bfin_read16(SPORT1_RCR1)
 #define bfin_write_SPORT1_RCR1(val)            bfin_write16(SPORT1_RCR1, val)
 #define bfin_read_SPORT1_RCR2()                        bfin_read16(SPORT1_RCR2)
@@ -1058,54 +1058,4 @@
 /* These need to be last due to the cdef/linux inter-dependencies */
 #include <asm/irq.h>
 
-/* Writing to PLL_CTL initiates a PLL relock sequence. */
-static __inline__ void bfin_write_PLL_CTL(unsigned int val)
-{
-       unsigned long flags, iwr0, iwr1;
-
-       if (val == bfin_read_PLL_CTL())
-               return;
-
-       local_irq_save_hw(flags);
-       /* Enable the PLL Wakeup bit in SIC IWR */
-       iwr0 = bfin_read32(SIC_IWR0);
-       iwr1 = bfin_read32(SIC_IWR1);
-       /* Only allow PPL Wakeup) */
-       bfin_write32(SIC_IWR0, IWR_ENABLE(0));
-       bfin_write32(SIC_IWR1, 0);
-
-       bfin_write16(PLL_CTL, val);
-       SSYNC();
-       asm("IDLE;");
-
-       bfin_write32(SIC_IWR0, iwr0);
-       bfin_write32(SIC_IWR1, iwr1);
-       local_irq_restore_hw(flags);
-}
-
-/* Writing to VR_CTL initiates a PLL relock sequence. */
-static __inline__ void bfin_write_VR_CTL(unsigned int val)
-{
-       unsigned long flags, iwr0, iwr1;
-
-       if (val == bfin_read_VR_CTL())
-               return;
-
-       local_irq_save_hw(flags);
-       /* Enable the PLL Wakeup bit in SIC IWR */
-       iwr0 = bfin_read32(SIC_IWR0);
-       iwr1 = bfin_read32(SIC_IWR1);
-       /* Only allow PPL Wakeup) */
-       bfin_write32(SIC_IWR0, IWR_ENABLE(0));
-       bfin_write32(SIC_IWR1, 0);
-
-       bfin_write16(VR_CTL, val);
-       SSYNC();
-       asm("IDLE;");
-
-       bfin_write32(SIC_IWR0, iwr0);
-       bfin_write32(SIC_IWR1, iwr1);
-       local_irq_restore_hw(flags);
-}
-
 #endif /* _CDEF_BF52X_H */