Merge branch 'sh/dwarf-unwinder' of git://github.com/mfleming/linux-2.6 into sh/dwarf...

[pandora-kernel.git] / arch / blackfin / kernel / cplb-mpu / cacheinit.c

diff --git a/arch/blackfin/kernel/cplb-mpu/cacheinit.c b/arch/blackfin/kernel/cplb-mpu/cacheinit.c
index a8b712a..d5a86c3 100644 (file)
--- a/arch/blackfin/kernel/cplb-mpu/cacheinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cacheinit.c
@@ -25,7 +25,7 @@
 #include <asm/cplbinit.h>
 
 #if defined(CONFIG_BFIN_ICACHE)
-void __init bfin_icache_init(void)
+void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
 {
        unsigned long ctrl;
        int i;
@@ -43,7 +43,7 @@ void __init bfin_icache_init(void)
 #endif
 
 #if defined(CONFIG_BFIN_DCACHE)
-void __init bfin_dcache_init(void)
+void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
 {
        unsigned long ctrl;
        int i;
@@ -55,7 +55,14 @@ void __init bfin_dcache_init(void)
        }
 
        ctrl = bfin_read_DMEM_CONTROL();
-       ctrl |= DMEM_CNTR;
+
+       /*
+        *  Anomaly notes:
+        *  05000287 - We implement workaround #2 - Change the DMEM_CONTROL
+        *  register, so that the port preferences for DAG0 and DAG1 are set
+        *  to port B
+        */
+       ctrl |= DMEM_CNTR | PORT_PREF0 | (ANOMALY_05000287 ? PORT_PREF1 : 0);
        bfin_write_DMEM_CONTROL(ctrl);
        SSYNC();
 }