/*
- * Copyright (C) 2004-2006 Atmel Corporation
+ * Copyright (C) 2004-2007 Atmel Corporation
*
* Based on MIPS implementation arch/mips/kernel/time.c
* Copyright 2001 MontaVista Software Inc.
#include <linux/init.h>
#include <linux/profile.h>
#include <linux/sysdev.h>
+#include <linux/err.h>
#include <asm/div64.h>
#include <asm/sysreg.h>
#include <asm/io.h>
#include <asm/sections.h>
-static cycle_t read_cycle_count(void)
+/* how many counter cycles in a jiffy? */
+static u32 cycles_per_jiffy;
+
+/* the count value for the next timer interrupt */
+static u32 expirelo;
+
+cycle_t __weak read_cycle_count(void)
{
return (cycle_t)sysreg_read(COUNT);
}
-static struct clocksource clocksource_avr32 = {
+struct clocksource __weak clocksource_avr32 = {
.name = "avr32",
.rating = 350,
.read = read_cycle_count,
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
+irqreturn_t __weak timer_interrupt(int irq, void *dev_id);
+
+struct irqaction timer_irqaction = {
+ .handler = timer_interrupt,
+ .flags = IRQF_DISABLED,
+ .name = "timer",
+};
+
/*
* By default we provide the null RTC ops
*/
static unsigned long null_rtc_get_time(void)
{
- return mktime(2004, 1, 1, 0, 0, 0);
+ return mktime(2007, 1, 1, 0, 0, 0);
}
static int null_rtc_set_time(unsigned long sec)
static unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
static int (*rtc_set_time)(unsigned long) = null_rtc_set_time;
-/* how many counter cycles in a jiffy? */
-static unsigned long cycles_per_jiffy;
-
-/* cycle counter value at the previous timer interrupt */
-static unsigned int timerhi, timerlo;
-
-/* the count value for the next timer interrupt */
-static unsigned int expirelo;
-
static void avr32_timer_ack(void)
{
- unsigned int count;
+ u32 count;
/* Ack this timer interrupt and set the next one */
expirelo += cycles_per_jiffy;
+ /* setting COMPARE to 0 stops the COUNT-COMPARE */
if (expirelo == 0) {
- printk(KERN_DEBUG "expirelo == 0\n");
sysreg_write(COMPARE, expirelo + 1);
} else {
sysreg_write(COMPARE, expirelo);
}
}
-static unsigned int avr32_hpt_read(void)
+int __weak avr32_hpt_init(void)
{
- return sysreg_read(COUNT);
+ int ret;
+ unsigned long mult, shift, count_hz;
+
+ count_hz = clk_get_rate(boot_cpu_data.clk);
+ shift = clocksource_avr32.shift;
+ mult = clocksource_hz2mult(count_hz, shift);
+ clocksource_avr32.mult = mult;
+
+ {
+ u64 tmp;
+
+ tmp = TICK_NSEC;
+ tmp <<= shift;
+ tmp += mult / 2;
+ do_div(tmp, mult);
+
+ cycles_per_jiffy = tmp;
+ }
+
+ ret = setup_irq(0, &timer_irqaction);
+ if (ret) {
+ pr_debug("timer: could not request IRQ 0: %d\n", ret);
+ return -ENODEV;
+ }
+
+ printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, "
+ "%lu.%03lu MHz\n",
+ ((count_hz + 500) / 1000) / 1000,
+ ((count_hz + 500) / 1000) % 1000);
+
+ return 0;
}
/*
* Taken from MIPS c0_hpt_timer_init().
*
- * Why is it so complicated, and what is "count"? My assumption is
- * that `count' specifies the "reference cycle", i.e. the cycle since
- * reset that should mean "zero". The reason COUNT is written twice is
- * probably to make sure we don't get any timer interrupts while we
- * are messing with the counter.
+ * The reason COUNT is written twice is probably to make sure we don't get any
+ * timer interrupts while we are messing with the counter.
*/
-static void avr32_hpt_init(unsigned int count)
+int __weak avr32_hpt_start(void)
{
- count = sysreg_read(COUNT) - count;
+ u32 count = sysreg_read(COUNT);
expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
sysreg_write(COUNT, expirelo - cycles_per_jiffy);
sysreg_write(COMPARE, expirelo);
sysreg_write(COUNT, count);
+
+ return 0;
}
/*
*
* In UP mode, it is invoked from the (global) timer_interrupt.
*/
-static void local_timer_interrupt(int irq, void *dev_id)
+void local_timer_interrupt(int irq, void *dev_id)
{
if (current->pid)
profile_tick(CPU_PROFILING);
update_process_times(user_mode(get_irq_regs()));
}
-static irqreturn_t
-timer_interrupt(int irq, void *dev_id)
+irqreturn_t __weak timer_interrupt(int irq, void *dev_id)
{
- unsigned int count;
-
/* ack timer interrupt and try to set next interrupt */
- count = avr32_hpt_read();
avr32_timer_ack();
- /* Update timerhi/timerlo for intra-jiffy calibration */
- timerhi += count < timerlo; /* Wrap around */
- timerlo = count;
-
/*
* Call the generic timer interrupt handler
*/
return IRQ_HANDLED;
}
-static struct irqaction timer_irqaction = {
- .handler = timer_interrupt,
- .flags = IRQF_DISABLED,
- .name = "timer",
-};
-
void __init time_init(void)
{
- unsigned long mult, shift, count_hz;
int ret;
+ /*
+ * Make sure we don't get any COMPARE interrupts before we can
+ * handle them.
+ */
+ sysreg_write(COMPARE, 0);
+
xtime.tv_sec = rtc_get_time();
xtime.tv_nsec = 0;
set_normalized_timespec(&wall_to_monotonic,
-xtime.tv_sec, -xtime.tv_nsec);
- printk("Before time_init: count=%08lx, compare=%08lx\n",
- (unsigned long)sysreg_read(COUNT),
- (unsigned long)sysreg_read(COMPARE));
-
- count_hz = clk_get_rate(boot_cpu_data.clk);
- shift = clocksource_avr32.shift;
- mult = clocksource_hz2mult(count_hz, shift);
- clocksource_avr32.mult = mult;
-
- printk("Cycle counter: mult=%lu, shift=%lu\n", mult, shift);
-
- {
- u64 tmp;
-
- tmp = TICK_NSEC;
- tmp <<= shift;
- tmp += mult / 2;
- do_div(tmp, mult);
-
- cycles_per_jiffy = tmp;
+ ret = avr32_hpt_init();
+ if (ret) {
+ pr_debug("timer: failed setup: %d\n", ret);
+ return;
}
- /* This sets up the high precision timer for the first interrupt. */
- avr32_hpt_init(avr32_hpt_read());
-
- printk("After time_init: count=%08lx, compare=%08lx\n",
- (unsigned long)sysreg_read(COUNT),
- (unsigned long)sysreg_read(COMPARE));
-
ret = clocksource_register(&clocksource_avr32);
if (ret)
- printk(KERN_ERR
- "timer: could not register clocksource: %d\n", ret);
+ pr_debug("timer: could not register clocksource: %d\n", ret);
- ret = setup_irq(0, &timer_irqaction);
- if (ret)
- printk("timer: could not request IRQ 0: %d\n", ret);
+ ret = avr32_hpt_start();
+ if (ret) {
+ pr_debug("timer: failed starting: %d\n", ret);
+ return;
+ }
}
static struct sysdev_class timer_class = {
- set_kset_name("timer"),
+ .name = "timer",
};
static struct sys_device timer_device = {
git.openpandora.org / pandora-kernel.git / blobdiff