ARM: 7205/2: sched_clock: allow sched_clock to be selected at runtime

[pandora-kernel.git] / arch / arm / plat-orion / time.c

diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 69a6136..1ed8d13 100644 (file)
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -12,7 +12,6 @@
  */
 
 #include <linux/kernel.h>
-#include <linux/sched.h>
 #include <linux/timer.h>
 #include <linux/clockchips.h>
 #include <linux/interrupt.h>
@@ -60,24 +59,10 @@ static u32 ticks_per_jiffy;
  * Orion's sched_clock implementation. It has a resolution of
  * at least 7.5ns (133MHz TCLK).
  */
-static DEFINE_CLOCK_DATA(cd);
 
-unsigned long long notrace sched_clock(void)
+static u32 notrace orion_read_sched_clock(void)
 {
-       u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
-       return cyc_to_sched_clock(&cd, cyc, (u32)~0);
-}
-
-
-static void notrace orion_update_sched_clock(void)
-{
-       u32 cyc = ~readl(timer_base + TIMER0_VAL_OFF);
-       update_sched_clock(&cd, cyc, (u32)~0);
-}
-
-static void __init setup_sched_clock(unsigned long tclk)
-{
-       init_sched_clock(&cd, orion_update_sched_clock, 32, tclk);
+       return ~readl(timer_base + TIMER0_VAL_OFF);
 }
 
 /*
@@ -217,7 +202,7 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
        /*
         * Set scale and timer for sched_clock.
         */
-       setup_sched_clock(tclk);
+       setup_sched_clock(orion_read_sched_clock, 32, tclk);
 
        /*
         * Setup free-running clocksource timer (interrupts