Merge branch 'devel' into next
[pandora-kernel.git] / arch / arm / plat-omap / sram.c
index 1f23f04..554ee58 100644 (file)
@@ -10,6 +10,7 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
+#undef DEBUG
 
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <asm/arch/sram.h>
 #include <asm/arch/board.h>
 
+#include <asm/arch/control.h>
+
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+# include "../mach-omap2/prm.h"
+# include "../mach-omap2/cm.h"
+# include "../mach-omap2/sdrc.h"
+#endif
+
 #define OMAP1_SRAM_PA          0x20000000
-#define OMAP1_SRAM_VA          0xd0000000
+#define OMAP1_SRAM_VA          VMALLOC_END
 #define OMAP2_SRAM_PA          0x40200000
 #define OMAP2_SRAM_PUB_PA      0x4020f800
-#define OMAP2_SRAM_VA          0xd0000000
-#define OMAP2_SRAM_PUB_VA      0xd0000800
-
-#if defined(CONFIG_ARCH_OMAP24XX)
+#define OMAP2_SRAM_VA          VMALLOC_END
+#define OMAP2_SRAM_PUB_VA      (VMALLOC_END + 0x800)
+#define OMAP3_SRAM_PA           0x40200000
+#define OMAP3_SRAM_VA           0xd7000000
+#define OMAP3_SRAM_PUB_PA       0x40208000
+#define OMAP3_SRAM_PUB_VA       0xd7008000
+
+#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
 #define SRAM_BOOTLOADER_SZ     0x00
 #else
 #define SRAM_BOOTLOADER_SZ     0x80
 #endif
 
-#define VA_REQINFOPERM0                IO_ADDRESS(0x68005048)
-#define VA_READPERM0           IO_ADDRESS(0x68005050)
-#define VA_WRITEPERM0          IO_ADDRESS(0x68005058)
-#define VA_CONTROL_STAT                IO_ADDRESS(0x480002F8)
+#define OMAP24XX_VA_REQINFOPERM0       IO_ADDRESS(0x68005048)
+#define OMAP24XX_VA_READPERM0          IO_ADDRESS(0x68005050)
+#define OMAP24XX_VA_WRITEPERM0         IO_ADDRESS(0x68005058)
+
+#define OMAP34XX_VA_REQINFOPERM0       IO_ADDRESS(0x68012848)
+#define OMAP34XX_VA_READPERM0          IO_ADDRESS(0x68012850)
+#define OMAP34XX_VA_WRITEPERM0         IO_ADDRESS(0x68012858)
+#define OMAP34XX_VA_ADDR_MATCH2                IO_ADDRESS(0x68012880)
+#define OMAP34XX_VA_SMS_RG_ATT0                IO_ADDRESS(0x6C000048)
+#define OMAP34XX_VA_CONTROL_STAT       IO_ADDRESS(0x480022F0)
+
 #define GP_DEVICE              0x300
-#define TYPE_MASK              0x700
 
 #define ROUND_DOWN(value,boundary)     ((value) & (~((boundary)-1)))
 
@@ -68,14 +87,21 @@ static int is_sram_locked(void)
        int type = 0;
 
        if (cpu_is_omap242x())
-               type = __raw_readl(VA_CONTROL_STAT) & TYPE_MASK;
+               type = system_rev & OMAP2_DEVICETYPE_MASK;
 
        if (type == GP_DEVICE) {
                /* RAMFW: R/W access to all initiators for all qualifier sets */
                if (cpu_is_omap242x()) {
-                       __raw_writel(0xFF, VA_REQINFOPERM0); /* all q-vects */
-                       __raw_writel(0xCFDE, VA_READPERM0);  /* all i-read */
-                       __raw_writel(0xCFDE, VA_WRITEPERM0); /* all i-write */
+                       __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
+                       __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0);  /* all i-read */
+                       __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
+               }
+               if (cpu_is_omap34xx()) {
+                       __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
+                       __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0);  /* all i-read */
+                       __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
+                       __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
+                       __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
                }
                return 0;
        } else
@@ -92,18 +118,30 @@ void __init omap_detect_sram(void)
 {
        unsigned long reserved;
 
-       if (cpu_is_omap24xx()) {
+       if (cpu_class_is_omap2()) {
                if (is_sram_locked()) {
-                       omap_sram_base = OMAP2_SRAM_PUB_VA;
-                       omap_sram_start = OMAP2_SRAM_PUB_PA;
-                       omap_sram_size = 0x800; /* 2K */
+                       if (cpu_is_omap34xx()) {
+                               omap_sram_base = OMAP3_SRAM_PUB_VA;
+                               omap_sram_start = OMAP3_SRAM_PUB_PA;
+                               omap_sram_size = 0x8000; /* 32K */
+                       } else {
+                               omap_sram_base = OMAP2_SRAM_PUB_VA;
+                               omap_sram_start = OMAP2_SRAM_PUB_PA;
+                               omap_sram_size = 0x800; /* 2K */
+                       }
                } else {
-                       omap_sram_base = OMAP2_SRAM_VA;
-                       omap_sram_start = OMAP2_SRAM_PA;
-                       if (cpu_is_omap242x())
-                               omap_sram_size = 0xa0000; /* 640K */
-                       else if (cpu_is_omap243x())
+                       if (cpu_is_omap34xx()) {
+                               omap_sram_base = OMAP3_SRAM_VA;
+                               omap_sram_start = OMAP3_SRAM_PA;
                                omap_sram_size = 0x10000; /* 64K */
+                       } else {
+                               omap_sram_base = OMAP2_SRAM_VA;
+                               omap_sram_start = OMAP2_SRAM_PA;
+                               if (cpu_is_omap242x())
+                                       omap_sram_size = 0xa0000; /* 640K */
+                               else if (cpu_is_omap243x())
+                                       omap_sram_size = 0x10000; /* 64K */
+                       }
                }
        } else {
                omap_sram_base = OMAP1_SRAM_VA;
@@ -157,6 +195,13 @@ void __init omap_map_sram(void)
                omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
        }
 
+       if (cpu_is_omap34xx()) {
+               omap_sram_io_desc[0].virtual = OMAP3_SRAM_VA;
+               base = OMAP3_SRAM_PA;
+               base = ROUND_DOWN(base, PAGE_SIZE);
+               omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
+       }
+
        omap_sram_io_desc[0].length = 1024 * 1024;      /* Use section desc */
        iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
 
@@ -191,6 +236,7 @@ void * omap_sram_push(void * start, unsigned long size)
        omap_sram_ceil -= size;
        omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
        memcpy((void *)omap_sram_ceil, start, size);
+       flush_icache_range((unsigned long)start, (unsigned long)(start + size));
 
        return (void *)omap_sram_ceil;
 }
@@ -214,8 +260,9 @@ void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
 
 int __init omap1_sram_init(void)
 {
-       _omap_sram_reprogram_clock = omap_sram_push(sram_reprogram_clock,
-                                                   sram_reprogram_clock_sz);
+       _omap_sram_reprogram_clock =
+                       omap_sram_push(omap1_sram_reprogram_clock,
+                                       omap1_sram_reprogram_clock_sz);
 
        return 0;
 }
@@ -224,7 +271,7 @@ int __init omap1_sram_init(void)
 #define omap1_sram_init()      do {} while (0)
 #endif
 
-#ifdef CONFIG_ARCH_OMAP2
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 
 static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
                              u32 base_cs, u32 force_unlock);
@@ -259,19 +306,109 @@ u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
 
        return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
 }
+#endif
+
+#ifdef CONFIG_ARCH_OMAP2420
+int __init omap242x_sram_init(void)
+{
+       _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
+                                       omap242x_sram_ddr_init_sz);
+
+       _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
+                                           omap242x_sram_reprogram_sdrc_sz);
+
+       _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
+                                        omap242x_sram_set_prcm_sz);
+
+       return 0;
+}
+#else
+static inline int omap242x_sram_init(void)
+{
+       return 0;
+}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP2430
+int __init omap243x_sram_init(void)
+{
+       _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
+                                       omap243x_sram_ddr_init_sz);
+
+       _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
+                                           omap243x_sram_reprogram_sdrc_sz);
+
+       _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
+                                        omap243x_sram_set_prcm_sz);
+
+       return 0;
+}
+#else
+static inline int omap243x_sram_init(void)
+{
+       return 0;
+}
+#endif
+
+#ifdef CONFIG_ARCH_OMAP3
+
+static u32 (*_omap2_sram_reprogram_gpmc)(u32 perf_level);
+u32 omap2_sram_reprogram_gpmc(u32 perf_level)
+{
+       if (!_omap2_sram_reprogram_gpmc)
+               omap_sram_error();
+
+       return _omap2_sram_reprogram_gpmc(perf_level);
+}
+
+static u32 (*_omap2_sram_configure_core_dpll)(u32 m, u32 n,
+                                               u32 freqsel, u32 m2);
+u32 omap2_sram_configure_core_dpll(u32 m, u32 n, u32 freqsel, u32 m2)
+{
+       if (!_omap2_sram_configure_core_dpll)
+               omap_sram_error();
+
+       return _omap2_sram_configure_core_dpll(m, n, freqsel, m2);
+}
 
-int __init omap2_sram_init(void)
+/* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */
+void restore_sram_functions(void)
 {
-       _omap2_sram_ddr_init = omap_sram_push(sram_ddr_init, sram_ddr_init_sz);
+       omap_sram_ceil = omap_sram_base + omap_sram_size;
 
-       _omap2_sram_reprogram_sdrc = omap_sram_push(sram_reprogram_sdrc,
-                                                   sram_reprogram_sdrc_sz);
-       _omap2_set_prcm = omap_sram_push(sram_set_prcm, sram_set_prcm_sz);
+       _omap2_sram_reprogram_gpmc = omap_sram_push(omap34xx_sram_reprogram_gpmc,
+               omap34xx_sram_reprogram_gpmc_sz);
+
+       _omap2_sram_configure_core_dpll =
+                       omap_sram_push(omap34xx_sram_configure_core_dpll,
+                                       omap34xx_sram_configure_core_dpll_sz);
+}
+
+int __init omap34xx_sram_init(void)
+{
+       _omap2_sram_ddr_init = omap_sram_push(omap34xx_sram_ddr_init,
+                                       omap34xx_sram_ddr_init_sz);
+
+       _omap2_sram_reprogram_sdrc = omap_sram_push(omap34xx_sram_reprogram_sdrc,
+                                       omap34xx_sram_reprogram_sdrc_sz);
+
+       _omap2_set_prcm = omap_sram_push(omap34xx_sram_set_prcm,
+                                       omap34xx_sram_set_prcm_sz);
+
+       _omap2_sram_reprogram_gpmc = omap_sram_push(omap34xx_sram_reprogram_gpmc,
+                                       omap34xx_sram_reprogram_gpmc_sz);
+
+       _omap2_sram_configure_core_dpll =
+                               omap_sram_push(omap34xx_sram_configure_core_dpll,
+                                       omap34xx_sram_configure_core_dpll_sz);
 
        return 0;
 }
 #else
-#define omap2_sram_init()      do {} while (0)
+static inline int omap34xx_sram_init(void)
+{
+       return 0;
+}
 #endif
 
 int __init omap_sram_init(void)
@@ -279,10 +416,14 @@ int __init omap_sram_init(void)
        omap_detect_sram();
        omap_map_sram();
 
-       if (!cpu_is_omap24xx())
+       if (!(cpu_class_is_omap2()))
                omap1_sram_init();
-       else
-               omap2_sram_init();
+       else if (cpu_is_omap242x())
+               omap242x_sram_init();
+       else if (cpu_is_omap2430())
+               omap243x_sram_init();
+       else if (cpu_is_omap34xx())
+               omap34xx_sram_init();
 
        return 0;
 }