Merge branch 'next' of git://github.com/kernelslacker/cpufreq

[pandora-kernel.git] / arch / arm / plat-omap / include / plat / dmtimer.h

diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index 2ac7538..d11025e 100644 (file)
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -73,15 +73,43 @@ struct omap_timer_capability_dev_attr {
 struct omap_dm_timer;
 struct clk;
 
+struct timer_regs {
+       u32 tidr;
+       u32 tiocp_cfg;
+       u32 tistat;
+       u32 tisr;
+       u32 tier;
+       u32 twer;
+       u32 tclr;
+       u32 tcrr;
+       u32 tldr;
+       u32 ttrg;
+       u32 twps;
+       u32 tmar;
+       u32 tcar1;
+       u32 tsicr;
+       u32 tcar2;
+       u32 tpir;
+       u32 tnir;
+       u32 tcvr;
+       u32 tocr;
+       u32 towr;
+};
+
 struct dmtimer_platform_data {
        int (*set_timer_src)(struct platform_device *pdev, int source);
        int timer_ip_version;
        u32 needs_manual_reset:1;
+       bool reserved;
+
+       bool loses_context;
+
+       u32 (*get_context_loss_count)(struct device *dev);
 };
 
 struct omap_dm_timer *omap_dm_timer_request(void);
 struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id);
-void omap_dm_timer_free(struct omap_dm_timer *timer);
+int omap_dm_timer_free(struct omap_dm_timer *timer);
 void omap_dm_timer_enable(struct omap_dm_timer *timer);
 void omap_dm_timer_disable(struct omap_dm_timer *timer);
 
@@ -90,23 +118,23 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
 u32 omap_dm_timer_modify_idlect_mask(u32 inputmask);
 struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer);
 
-void omap_dm_timer_trigger(struct omap_dm_timer *timer);
-void omap_dm_timer_start(struct omap_dm_timer *timer);
-void omap_dm_timer_stop(struct omap_dm_timer *timer);
+int omap_dm_timer_trigger(struct omap_dm_timer *timer);
+int omap_dm_timer_start(struct omap_dm_timer *timer);
+int omap_dm_timer_stop(struct omap_dm_timer *timer);
 
 int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
-void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
-void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
-void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
-void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger);
-void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
+int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
+int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
+int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
+int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger);
+int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
 
-void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
 
 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer);
-void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
 unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer);
-void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value);
 
 int omap_dm_timers_active(void);
 
@@ -243,13 +271,17 @@ struct omap_dm_timer {
 
        unsigned long rate;
        unsigned reserved:1;
-       unsigned enabled:1;
        unsigned posted:1;
+       struct timer_regs context;
+       bool loses_context;
+       int ctx_loss_count;
+       int revision;
        struct platform_device *pdev;
        struct list_head node;
+
+       u32 (*get_context_loss_count)(struct device *dev);
 };
 
-extern u32 sys_timer_reserved;
 int omap_dm_timer_prepare(struct omap_dm_timer *timer);
 
 static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg,
@@ -279,6 +311,7 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
        /* Assume v1 ip if bits [31:16] are zero */
        tidr = __raw_readl(timer->io_base);
        if (!(tidr >> 16)) {
+               timer->revision = 1;
                timer->sys_stat = timer->io_base +
                                OMAP_TIMER_V1_SYS_STAT_OFFSET;
                timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET;
@@ -287,6 +320,7 @@ static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
                timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET;
                timer->func_base = timer->io_base;
        } else {
+               timer->revision = 2;
                timer->sys_stat = 0;
                timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS;
                timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET;