Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid

[pandora-kernel.git] / arch / arm / plat-omap / include / plat / control.h

diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h
index a745d62..131bf40 100644 (file)
--- a/arch/arm/plat-omap/include/plat/control.h
+++ b/arch/arm/plat-omap/include/plat/control.h
@@ -160,6 +160,14 @@
 #define OMAP343X_CONTROL_SRAMLDO5      (OMAP2_CONTROL_GENERAL + 0x02C0)
 #define OMAP343X_CONTROL_CSI           (OMAP2_CONTROL_GENERAL + 0x02C4)
 
+/* AM35XX only CONTROL_GENERAL register offsets */
+#define AM35XX_CONTROL_MSUSPENDMUX_6    (OMAP2_CONTROL_GENERAL + 0x0038)
+#define AM35XX_CONTROL_DEVCONF2         (OMAP2_CONTROL_GENERAL + 0x0310)
+#define AM35XX_CONTROL_DEVCONF3         (OMAP2_CONTROL_GENERAL + 0x0314)
+#define AM35XX_CONTROL_CBA_PRIORITY     (OMAP2_CONTROL_GENERAL + 0x0320)
+#define AM35XX_CONTROL_LVL_INTR_CLEAR   (OMAP2_CONTROL_GENERAL + 0x0324)
+#define AM35XX_CONTROL_IP_SW_RESET      (OMAP2_CONTROL_GENERAL + 0x0328)
+#define AM35XX_CONTROL_IPSS_CLK_CTRL    (OMAP2_CONTROL_GENERAL + 0x032C)
 
 /* 34xx PADCONF register offsets */
 #define OMAP343X_PADCONF_ETK(i)                (OMAP2_CONTROL_PADCONFS + 0x5a8 + \
@@ -196,6 +204,12 @@
 #define OMAP3_PADCONF_SAD2D_MSTANDBY   0x250
 #define OMAP3_PADCONF_SAD2D_IDLEACK    0x254
 
+/* 44xx control status register offset */
+#define OMAP44XX_CONTROL_STATUS                0x2c4
+
+/* 44xx-only CONTROL_GENERAL register offsets */
+#define OMAP44XX_CONTROL_MMC1                  0x628
+#define OMAP44XX_CONTROL_PBIAS_LITE            0x600
 /*
  * REVISIT: This list of registers is not comprehensive - there are more
  * that should be added.
@@ -241,6 +255,23 @@
 #define OMAP2_PBIASLITEPWRDNZ0         (1 << 1)
 #define OMAP2_PBIASLITEVMODE0          (1 << 0)
 
+/* CONTROL_PBIAS_LITE bits for OMAP4 */
+#define OMAP4_MMC1_PWRDNZ                      (1 << 26)
+#define OMAP4_MMC1_PBIASLITE_HIZ_MODE          (1 << 25)
+#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT     (1 << 24)
+#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR       (1 << 23)
+#define OMAP4_MMC1_PBIASLITE_PWRDNZ            (1 << 22)
+#define OMAP4_MMC1_PBIASLITE_VMODE             (1 << 21)
+#define OMAP4_USBC1_ICUSB_PWRDNZ               (1 << 20)
+
+#define OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP0    (1 << 31)
+#define OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP1    (1 << 30)
+#define OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP2    (1 << 29)
+#define OMAP4_CONTROL_SDMMC1_PUSTRENGTHGRP3    (1 << 28)
+#define OMAP4_CONTROL_SDMMC1_DR0_SPEEDCTRL     (1 << 27)
+#define OMAP4_CONTROL_SDMMC1_DR1_SPEEDCTRL     (1 << 26)
+#define OMAP4_CONTROL_SDMMC1_DR2_SPEEDCTRL     (1 << 25)
+
 /* CONTROL_PROG_IO1 bits */
 #define OMAP3630_PRG_SDMMC1_SPEEDCTRL  (1 << 20)
 
@@ -257,6 +288,32 @@
 #define OMAP343X_SCRATCHPAD            (OMAP343X_CTRL_BASE + 0x910)
 #define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C
 
+/* AM35XX_CONTROL_IPSS_CLK_CTRL bits */
+#define AM35XX_USBOTG_VBUSP_CLK_SHIFT   0
+#define AM35XX_CPGMAC_VBUSP_CLK_SHIFT   1
+#define AM35XX_VPFE_VBUSP_CLK_SHIFT     2
+#define AM35XX_HECC_VBUSP_CLK_SHIFT     3
+#define AM35XX_USBOTG_FCLK_SHIFT        8
+#define AM35XX_CPGMAC_FCLK_SHIFT        9
+#define AM35XX_VPFE_FCLK_SHIFT          10
+
+/*AM35XX CONTROL_LVL_INTR_CLEAR bits*/
+#define AM35XX_CPGMAC_C0_MISC_PULSE_CLR        BIT(0)
+#define AM35XX_CPGMAC_C0_RX_PULSE_CLR  BIT(1)
+#define AM35XX_CPGMAC_C0_RX_THRESH_CLR BIT(2)
+#define AM35XX_CPGMAC_C0_TX_PULSE_CLR  BIT(3)
+#define AM35XX_USBOTGSS_INT_CLR                BIT(4)
+#define AM35XX_VPFE_CCDC_VD0_INT_CLR   BIT(5)
+#define AM35XX_VPFE_CCDC_VD1_INT_CLR   BIT(6)
+#define AM35XX_VPFE_CCDC_VD2_INT_CLR   BIT(7)
+
+/*AM35XX CONTROL_IP_SW_RESET bits*/
+#define AM35XX_USBOTGSS_SW_RST         BIT(0)
+#define AM35XX_CPGMACSS_SW_RST         BIT(1)
+#define AM35XX_VPFE_VBUSP_SW_RST       BIT(2)
+#define AM35XX_HECC_SW_RST             BIT(3)
+#define AM35XX_VPFE_PCLK_SW_RST                BIT(4)
+
 /*
  * CONTROL OMAP STATUS register to identify OMAP3 features
  */
@@ -292,8 +349,7 @@
 
 
 #ifndef __ASSEMBLY__
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
-               defined(CONFIG_ARCH_OMAP4)
+#ifdef CONFIG_ARCH_OMAP2PLUS
 extern void __iomem *omap_ctrl_base_get(void);
 extern u8 omap_ctrl_readb(u16 offset);
 extern u16 omap_ctrl_readw(u16 offset);