Merge branch 'linux-next' of git://git.infradead.org/ubifs-2.6

[pandora-kernel.git] / arch / arm / plat-omap / dma.c

diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 7fc8c04..def14ec 100644 (file)
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -10,6 +10,9 @@
  * Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com>
  * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
  *
+ * Copyright (C) 2009 Texas Instruments
+ * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
+ *
  * Support functions for the OMAP internal DMA channels.
  *
  * This program is free software; you can redistribute it and/or modify
@@ -310,41 +313,62 @@ EXPORT_SYMBOL(omap_set_dma_transfer_params);
 
 void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
 {
-       u16 w;
-
        BUG_ON(omap_dma_in_1510_mode());
 
-       if (cpu_class_is_omap2()) {
-               REVISIT_24XX();
-               return;
-       }
+       if (cpu_class_is_omap1()) {
+               u16 w;
 
-       w = dma_read(CCR2(lch));
-       w &= ~0x03;
+               w = dma_read(CCR2(lch));
+               w &= ~0x03;
 
-       switch (mode) {
-       case OMAP_DMA_CONSTANT_FILL:
-               w |= 0x01;
-               break;
-       case OMAP_DMA_TRANSPARENT_COPY:
-               w |= 0x02;
-               break;
-       case OMAP_DMA_COLOR_DIS:
-               break;
-       default:
-               BUG();
+               switch (mode) {
+               case OMAP_DMA_CONSTANT_FILL:
+                       w |= 0x01;
+                       break;
+               case OMAP_DMA_TRANSPARENT_COPY:
+                       w |= 0x02;
+                       break;
+               case OMAP_DMA_COLOR_DIS:
+                       break;
+               default:
+                       BUG();
+               }
+               dma_write(w, CCR2(lch));
+
+               w = dma_read(LCH_CTRL(lch));
+               w &= ~0x0f;
+               /* Default is channel type 2D */
+               if (mode) {
+                       dma_write((u16)color, COLOR_L(lch));
+                       dma_write((u16)(color >> 16), COLOR_U(lch));
+                       w |= 1;         /* Channel type G */
+               }
+               dma_write(w, LCH_CTRL(lch));
        }
-       dma_write(w, CCR2(lch));
 
-       w = dma_read(LCH_CTRL(lch));
-       w &= ~0x0f;
-       /* Default is channel type 2D */
-       if (mode) {
-               dma_write((u16)color, COLOR_L(lch));
-               dma_write((u16)(color >> 16), COLOR_U(lch));
-               w |= 1;         /* Channel type G */
+       if (cpu_class_is_omap2()) {
+               u32 val;
+
+               val = dma_read(CCR(lch));
+               val &= ~((1 << 17) | (1 << 16));
+
+               switch (mode) {
+               case OMAP_DMA_CONSTANT_FILL:
+                       val |= 1 << 16;
+                       break;
+               case OMAP_DMA_TRANSPARENT_COPY:
+                       val |= 1 << 17;
+                       break;
+               case OMAP_DMA_COLOR_DIS:
+                       break;
+               default:
+                       BUG();
+               }
+               dma_write(val, CCR(lch));
+
+               color &= 0xffffff;
+               dma_write(color, COLOR(lch));
        }
-       dma_write(w, LCH_CTRL(lch));
 }
 EXPORT_SYMBOL(omap_set_dma_color_mode);
 
@@ -851,7 +875,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
        }
        l = dma_read(CCR(lch));
        l &= ~((1 << 6) | (1 << 26));
-       if (cpu_is_omap2430() || cpu_is_omap34xx())
+       if (cpu_is_omap2430() || cpu_is_omap34xx() ||  cpu_is_omap44xx())
                l |= ((read_prio & 0x1) << 6) | ((write_prio & 0x1) << 26);
        else
                l |= ((read_prio & 0x1) << 6);
@@ -1199,7 +1223,7 @@ static void create_dma_lch_chain(int lch_head, int lch_queue)
  *          Failure: -EINVAL/-ENOMEM
  */
 int omap_request_dma_chain(int dev_id, const char *dev_name,
-                          void (*callback) (int chain_id, u16 ch_status,
+                          void (*callback) (int lch, u16 ch_status,
                                             void *data),
                           int *chain_id, int no_of_chans, int chain_mode,
                           struct omap_dma_channel_params params)
@@ -1823,7 +1847,8 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
 #define omap1_dma_irq_handler  NULL
 #endif
 
-#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
+                       defined(CONFIG_ARCH_OMAP4)
 
 static int omap2_dma_handle_ch(int ch)
 {
@@ -2318,6 +2343,9 @@ static int __init omap_init_dma(void)
        } else if (cpu_is_omap34xx()) {
                omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
                dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
+       } else if (cpu_is_omap44xx()) {
+               omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE);
+               dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
        } else {
                pr_err("DMA init failed for unsupported omap\n");
                return -ENODEV;
@@ -2416,12 +2444,18 @@ static int __init omap_init_dma(void)
                }
        }
 
-       if (cpu_is_omap2430() || cpu_is_omap34xx())
+       if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx())
                omap_dma_set_global_params(DMA_DEFAULT_ARB_RATE,
                                DMA_DEFAULT_FIFO_DEPTH, 0);
 
-       if (cpu_class_is_omap2())
-               setup_irq(INT_24XX_SDMA_IRQ0, &omap24xx_dma_irq);
+       if (cpu_class_is_omap2()) {
+               int irq;
+               if (cpu_is_omap44xx())
+                       irq = INT_44XX_SDMA_IRQ0;
+               else
+                       irq = INT_24XX_SDMA_IRQ0;
+               setup_irq(irq, &omap24xx_dma_irq);
+       }
 
        /* FIXME: Update LCD DMA to work on 24xx */
        if (cpu_class_is_omap1()) {