Merge branch 'kbuild' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6

[pandora-kernel.git] / arch / arm / plat-mxc / include / mach / mxc91231.h

diff --git a/arch/arm/plat-mxc/include/mach/mxc91231.h b/arch/arm/plat-mxc/include/mach/mxc91231.h
index 5182b98..765190f 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mxc91231.h
+++ b/arch/arm/plat-mxc/include/mach/mxc91231.h
@@ -13,10 +13,6 @@
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #ifndef __MACH_MXC91231_H__
 #define __MACH_MXC91231_H__
@@ -25,14 +21,12 @@
  * L2CC
  */
 #define MXC91231_L2CC_BASE_ADDR                0x30000000
-#define MXC91231_L2CC_BASE_ADDR_VIRT   0xF9000000
 #define MXC91231_L2CC_SIZE             SZ_64K
 
 /*
  * AIPS 1
  */
 #define MXC91231_AIPS1_BASE_ADDR       0x43F00000
-#define MXC91231_AIPS1_BASE_ADDR_VIRT  0xFC000000
 #define MXC91231_AIPS1_SIZE            SZ_1M
 
 #define MXC91231_AIPS1_CTRL_BASE_ADDR  MXC91231_AIPS1_BASE_ADDR
@@ -57,7 +51,6 @@
  * AIPS 2
  */
 #define MXC91231_AIPS2_BASE_ADDR       0x53F00000
-#define MXC91231_AIPS2_BASE_ADDR_VIRT  0xFC100000
 #define MXC91231_AIPS2_SIZE            SZ_1M
 
 #define MXC91231_GEMK_BASE_ADDR                (MXC91231_AIPS2_BASE_ADDR + 0x8C000)
@@ -83,7 +76,6 @@
  * SPBA global module 0
  */
 #define MXC91231_SPBA0_BASE_ADDR       0x50000000
-#define MXC91231_SPBA0_BASE_ADDR_VIRT  0xFC200000
 #define MXC91231_SPBA0_SIZE            SZ_1M
 
 #define MXC91231_MMC_SDHC1_BASE_ADDR   (MXC91231_SPBA0_BASE_ADDR + 0x04000)
@@ -113,7 +105,6 @@
  * SPBA global module 1
  */
 #define MXC91231_SPBA1_BASE_ADDR       0x52000000
-#define MXC91231_SPBA1_BASE_ADDR_VIRT  0xFC300000
 #define MXC91231_SPBA1_SIZE            SZ_1M
 
 #define MXC91231_MQSPI_BASE_ADDR       (MXC91231_SPBA1_BASE_ADDR + 0x34000)
@@ -148,18 +139,15 @@
  * ROMP and AVIC
  */
 #define MXC91231_ROMP_BASE_ADDR                0x60000000
-#define MXC91231_ROMP_BASE_ADDR_VIRT   0xFC400000
 #define MXC91231_ROMP_SIZE             SZ_64K
 
 #define MXC91231_AVIC_BASE_ADDR                0x68000000
-#define MXC91231_AVIC_BASE_ADDR_VIRT   0xFC410000
 #define MXC91231_AVIC_SIZE             SZ_64K
 
 /*
  * NAND, SDRAM, WEIM, M3IF, EMI controllers
  */
 #define MXC91231_X_MEMC_BASE_ADDR      0xB8000000
-#define MXC91231_X_MEMC_BASE_ADDR_VIRT 0xFC420000
 #define MXC91231_X_MEMC_SIZE           SZ_64K
 
 #define MXC91231_NFC_BASE_ADDR         (MXC91231_X_MEMC_BASE_ADDR + 0x0000)
@@ -187,19 +175,10 @@
 /*
  * This macro defines the physical to virtual address mapping for all the
  * peripheral modules. It is used by passing in the physical address as x
- * and returning the virtual address. If the physical address is not mapped,
- * it returns 0.
+ * and returning the virtual address.
  */
-
-#define MXC91231_IO_ADDRESS(x) (                                       \
-       IMX_IO_ADDRESS(x, MXC91231_L2CC) ?:                             \
-       IMX_IO_ADDRESS(x, MXC91231_X_MEMC) ?:                           \
-       IMX_IO_ADDRESS(x, MXC91231_ROMP) ?:                             \
-       IMX_IO_ADDRESS(x, MXC91231_AVIC) ?:                             \
-       IMX_IO_ADDRESS(x, MXC91231_AIPS1) ?:                            \
-       IMX_IO_ADDRESS(x, MXC91231_SPBA0) ?:                            \
-       IMX_IO_ADDRESS(x, MXC91231_SPBA1) ?:                            \
-       IMX_IO_ADDRESS(x, MXC91231_AIPS2))
+#define MXC91231_IO_P2V(x)             IMX_IO_P2V(x)
+#define MXC91231_IO_ADDRESS(x)         IOMEM(MXC91231_IO_P2V(x))
 
 /*
  * Interrupt numbers