Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...

[pandora-kernel.git] / arch / arm / plat-mxc / include / mach / mx27.h

diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index 3116b3b..cbc43ad 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -51,6 +51,12 @@
 #define MX27_SDHC1_BASE_ADDR                   (MX27_AIPI_BASE_ADDR + 0x13000)
 #define MX27_SDHC2_BASE_ADDR                   (MX27_AIPI_BASE_ADDR + 0x14000)
 #define MX27_GPIO_BASE_ADDR                    (MX27_AIPI_BASE_ADDR + 0x15000)
+#define MX27_GPIO1_BASE_ADDR                   (MX27_GPIO_BASE_ADDR + 0x000)
+#define MX27_GPIO2_BASE_ADDR                   (MX27_GPIO_BASE_ADDR + 0x100)
+#define MX27_GPIO3_BASE_ADDR                   (MX27_GPIO_BASE_ADDR + 0x200)
+#define MX27_GPIO4_BASE_ADDR                   (MX27_GPIO_BASE_ADDR + 0x300)
+#define MX27_GPIO5_BASE_ADDR                   (MX27_GPIO_BASE_ADDR + 0x400)
+#define MX27_GPIO6_BASE_ADDR                   (MX27_GPIO_BASE_ADDR + 0x500)
 #define MX27_AUDMUX_BASE_ADDR                  (MX27_AIPI_BASE_ADDR + 0x16000)
 #define MX27_CSPI3_BASE_ADDR                   (MX27_AIPI_BASE_ADDR + 0x17000)
 #define MX27_MSHC_BASE_ADDR                    (MX27_AIPI_BASE_ADDR + 0x18000)
@@ -64,11 +70,13 @@
 #define MX27_LCDC_BASE_ADDR                    (MX27_AIPI_BASE_ADDR + 0x21000)
 #define MX27_SLCDC_BASE_ADDR                   (MX27_AIPI_BASE_ADDR + 0x22000)
 #define MX27_VPU_BASE_ADDR                     (MX27_AIPI_BASE_ADDR + 0x23000)
-#define MX27_USBOTG_BASE_ADDR                  (MX27_AIPI_BASE_ADDR + 0x24000)
-#define MX27_OTG_BASE_ADDR                     MX27_USBOTG_BASE_ADDR
+#define MX27_USB_BASE_ADDR                     (MX27_AIPI_BASE_ADDR + 0x24000)
+#define MX27_USB_OTG_BASE_ADDR                 (MX27_USB_BASE_ADDR + 0x0000)
+#define MX27_USB_HS1_BASE_ADDR                 (MX27_USB_BASE_ADDR + 0x0200)
+#define MX27_USB_HS2_BASE_ADDR                 (MX27_USB_BASE_ADDR + 0x0400)
 #define MX27_SAHARA_BASE_ADDR                  (MX27_AIPI_BASE_ADDR + 0x25000)
-#define MX27_EMMA_PP_BASE_ADDR                 (MX27_AIPI_BASE_ADDR + 0x26000)
-#define MX27_EMMA_PRP_BASE_ADDR                        (MX27_AIPI_BASE_ADDR + 0x26400)
+#define MX27_EMMAPP_BASE_ADDR                  (MX27_AIPI_BASE_ADDR + 0x26000)
+#define MX27_EMMAPRP_BASE_ADDR                 (MX27_AIPI_BASE_ADDR + 0x26400)
 #define MX27_CCM_BASE_ADDR                     (MX27_AIPI_BASE_ADDR + 0x27000)
 #define MX27_SYSCTRL_BASE_ADDR                 (MX27_AIPI_BASE_ADDR + 0x27800)
 #define MX27_IIM_BASE_ADDR                     (MX27_AIPI_BASE_ADDR + 0x28000)
@@ -187,9 +195,9 @@ static inline void mx27_setup_weimcs(size_t cs,
 #define MX27_INT_EMMAPRP       51
 #define MX27_INT_EMMAPP                52
 #define MX27_INT_VPU           53
-#define MX27_INT_USB1          54
-#define MX27_INT_USB2          55
-#define MX27_INT_USB3          56
+#define MX27_INT_USB_HS1       54
+#define MX27_INT_USB_HS2       55
+#define MX27_INT_USB_OTG       56
 #define MX27_INT_SCC_SMN       57
 #define MX27_INT_SCC_SCM       58
 #define MX27_INT_SAHARA                59
@@ -236,10 +244,6 @@ static inline void mx27_setup_weimcs(size_t cs,
 #define MX27_DMA_REQ_SDHC3     36
 #define MX27_DMA_REQ_NFC       37
 
-/* silicon revisions specific to i.MX27 */
-#define CHIP_REV_1_0           0x00
-#define CHIP_REV_2_0           0x01
-
 #ifndef __ASSEMBLY__
 extern int mx27_revision(void);
 #endif