Merge ../linux-2.6
[pandora-kernel.git] / arch / arm / mm / proc-xscale.S
index 2d3823e..561bff7 100644 (file)
@@ -24,8 +24,8 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/procinfo.h>
-#include <asm/hardware.h>
 #include <asm/pgtable.h>
+#include <asm/pgtable-hwdef.h>
 #include <asm/page.h>
 #include <asm/ptrace.h>
 #include "proc-macros.S"
@@ -138,17 +138,23 @@ ENTRY(cpu_xscale_proc_fin)
  * to what would be the reset vector.
  *
  * loc: location to jump to for soft reset
+ *
+ * Beware PXA270 erratum E7.
  */
        .align  5
 ENTRY(cpu_xscale_reset)
        mov     r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
        msr     cpsr_c, r1                      @ reset CPSR
+       mcr     p15, 0, r1, c10, c4, 1          @ unlock I-TLB
+       mcr     p15, 0, r1, c8, c5, 0           @ invalidate I-TLB
        mrc     p15, 0, r1, c1, c0, 0           @ ctrl register
        bic     r1, r1, #0x0086                 @ ........B....CA.
        bic     r1, r1, #0x3900                 @ ..VIZ..S........
+       sub     pc, pc, #4                      @ flush pipeline
+       @ *** cache line aligned ***
        mcr     p15, 0, r1, c1, c0, 0           @ ctrl register
-       mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches & BTB
        bic     r1, r1, #0x0001                 @ ...............M
+       mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches & BTB
        mcr     p15, 0, r1, c1, c0, 0           @ ctrl register
        @ CAUTION: MMU turned off from this point. We count on the pipeline
        @ already containing those two last instructions to survive.
@@ -475,11 +481,12 @@ __xscale_setup:
        orr     r0, r0, #1 << 6                 @ cp6 for IOP3xx and Bulverde
        orr     r0, r0, #1 << 13                @ Its undefined whether this
        mcr     p15, 0, r0, c15, c1, 0          @ affects USR or SVC modes
+
+       adr     r5, xscale_crval
+       ldmia   r5, {r5, r6}
        mrc     p15, 0, r0, c1, c0, 0           @ get control register
-       ldr     r5, xscale_cr1_clear
        bic     r0, r0, r5
-       ldr     r5, xscale_cr1_set
-       orr     r0, r0, r5
+       orr     r0, r0, r6
        mov     pc, lr
        .size   __xscale_setup, . - __xscale_setup
 
@@ -489,12 +496,9 @@ __xscale_setup:
         * ..11 1.01 .... .101
         * 
         */
-       .type   xscale_cr1_clear, #object
-       .type   xscale_cr1_set, #object
-xscale_cr1_clear:
-       .word   0x3b07
-xscale_cr1_set:
-       .word   0x3905
+       .type   xscale_crval, #object
+xscale_crval:
+       crval   clear=0x00003b07, mmuset=0x00003905, ucset=0x00001900
 
        __INITDATA
 
@@ -532,6 +536,11 @@ cpu_80200_name:
        .asciz  "XScale-80200"
        .size   cpu_80200_name, . - cpu_80200_name
 
+       .type   cpu_80219_name, #object
+cpu_80219_name:
+       .asciz  "XScale-80219"
+       .size   cpu_80219_name, . - cpu_80219_name
+
        .type   cpu_8032x_name, #object
 cpu_8032x_name:
        .asciz  "XScale-IOP8032x Family"
@@ -595,6 +604,9 @@ __80200_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -606,15 +618,41 @@ __80200_proc_info:
        .long   xscale_cache_fns
        .size   __80200_proc_info, . - __80200_proc_info
 
+       .type   __80219_proc_info,#object
+__80219_proc_info:
+       .long   0x69052e20
+       .long   0xffffffe0
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_BUFFERABLE | \
+               PMD_SECT_CACHEABLE | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
+       b       __xscale_setup
+       .long   cpu_arch_name
+       .long   cpu_elf_name
+       .long   HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
+       .long   cpu_80219_name
+       .long   xscale_processor_functions
+       .long   v4wbi_tlb_fns
+       .long   xscale_mc_user_fns
+       .long   xscale_cache_fns
+       .size   __80219_proc_info, . - __80219_proc_info
+
        .type   __8032x_proc_info,#object
 __8032x_proc_info:
        .long   0x69052420
-       .long   0xfffff5e0      @ mask should accomodate IOP80219 also
+       .long   0xffffffe0
        .long   PMD_TYPE_SECT | \
                PMD_SECT_BUFFERABLE | \
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -635,6 +673,9 @@ __8033x_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -655,6 +696,9 @@ __pxa250_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -675,6 +719,9 @@ __pxa210_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -695,6 +742,9 @@ __ixp2400_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -715,6 +765,9 @@ __ixp2800_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -735,6 +788,9 @@ __ixp42x_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -750,7 +806,14 @@ __ixp42x_proc_info:
 __ixp46x_proc_info:
        .long   0x69054200
        .long   0xffffff00
-       .long   0x00000c0e
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_BUFFERABLE | \
+               PMD_SECT_CACHEABLE | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -771,6 +834,9 @@ __pxa255_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
@@ -791,6 +857,9 @@ __pxa270_proc_info:
                PMD_SECT_CACHEABLE | \
                PMD_SECT_AP_WRITE | \
                PMD_SECT_AP_READ
+       .long   PMD_TYPE_SECT | \
+               PMD_SECT_AP_WRITE | \
+               PMD_SECT_AP_READ
        b       __xscale_setup
        .long   cpu_arch_name
        .long   cpu_elf_name