Remove obsolete #include <linux/config.h>

[pandora-kernel.git] / arch / arm / mm / proc-arm1026.S

diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 931b690..33e1ab8 100644 (file)
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -3,6 +3,7 @@
  *
  *  Copyright (C) 2000 ARM Limited
  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
+ *  hacked for non-paged-MM by Hyok S. Choi, 2003.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -14,10 +15,10 @@
  * functions on the ARM1026EJ-S.
  */
 #include <linux/linkage.h>
-#include <linux/config.h>
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
 #include <asm/procinfo.h>
 #include <asm/ptrace.h>
@@ -89,7 +90,9 @@ ENTRY(cpu_arm1026_reset)
        mov     ip, #0
        mcr     p15, 0, ip, c7, c7, 0           @ invalidate I,D caches
        mcr     p15, 0, ip, c7, c10, 4          @ drain WB
+#ifdef CONFIG_MMU
        mcr     p15, 0, ip, c8, c7, 0           @ invalidate I & D TLBs
+#endif
        mrc     p15, 0, ip, c1, c0, 0           @ ctrl register
        bic     ip, ip, #0x000f                 @ ............wcam
        bic     ip, ip, #0x1100                 @ ...i...s........
@@ -326,6 +329,7 @@ ENTRY(cpu_arm1026_dcache_clean_area)
  */
        .align  5
 ENTRY(cpu_arm1026_switch_mm)
+#ifdef CONFIG_MMU
        mov     r1, #0
 #ifndef CONFIG_CPU_DCACHE_DISABLE
 1:     mrc     p15, 0, r15, c7, c14, 3         @ test, clean, invalidate
@@ -337,6 +341,7 @@ ENTRY(cpu_arm1026_switch_mm)
        mcr     p15, 0, r1, c7, c10, 4          @ drain WB
        mcr     p15, 0, r0, c2, c0, 0           @ load page table pointer
        mcr     p15, 0, r1, c8, c7, 0           @ invalidate I & D TLBs
+#endif
        mov     pc, lr
         
 /*
@@ -346,6 +351,7 @@ ENTRY(cpu_arm1026_switch_mm)
  */
        .align  5
 ENTRY(cpu_arm1026_set_pte)
+#ifdef CONFIG_MMU
        str     r1, [r0], #-2048                @ linux version
 
        eor     r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
@@ -373,6 +379,7 @@ ENTRY(cpu_arm1026_set_pte)
 #ifndef CONFIG_CPU_DCACHE_DISABLE
        mcr     p15, 0, r0, c7, c10, 1          @ clean D entry
 #endif
+#endif /* CONFIG_MMU */
        mov     pc, lr
 
 
@@ -383,8 +390,10 @@ __arm1026_setup:
        mov     r0, #0
        mcr     p15, 0, r0, c7, c7              @ invalidate I,D caches on v4
        mcr     p15, 0, r0, c7, c10, 4          @ drain write buffer on v4
+#ifdef CONFIG_MMU
        mcr     p15, 0, r0, c8, c7              @ invalidate I,D TLBs on v4
        mcr     p15, 0, r4, c2, c0              @ load page table pointer
+#endif
 #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
        mov     r0, #4                          @ explicitly disable writeback
        mcr     p15, 7, r0, c15, c0, 0
@@ -469,7 +478,7 @@ cpu_arm1026_name:
 
        .align
 
-       .section ".proc.info", #alloc, #execinstr
+       .section ".proc.info.init", #alloc, #execinstr
 
        .type   __arm1026_proc_info,#object
 __arm1026_proc_info: