Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

[pandora-kernel.git] / arch / arm / mm / Kconfig

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 4414a01..9d30c6f 100644 (file)
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -382,6 +382,12 @@ config CPU_FEROCEON_OLD_ID
          for which the CPU ID is equal to the ARM926 ID.
          Relevant for Feroceon-1850 and early Feroceon-2850.
 
+# Marvell PJ4
+config CPU_PJ4
+       bool
+       select CPU_V7
+       select ARM_THUMBEE
+
 # ARMv6
 config CPU_V6
        bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX || ARCH_DOVE
@@ -599,6 +605,14 @@ config CPU_CP15_MPU
        help
          Processor has the CP15 register, which has MPU related registers.
 
+config CPU_USE_DOMAINS
+       bool
+       depends on MMU
+       default y if !CPU_32v6K
+       help
+         This option enables or disables the use of domain switching
+         via the set_fs() function.
+
 #
 # CPU supports 36-bit I/O
 #
@@ -628,6 +642,33 @@ config ARM_THUMBEE
          Say Y here if you have a CPU with the ThumbEE extension and code to
          make use of it. Say N for code that can run on CPUs without ThumbEE.
 
+config SWP_EMULATE
+       bool "Emulate SWP/SWPB instructions"
+       depends on CPU_V7 && !CPU_V6
+       select HAVE_PROC_CPU if PROC_FS
+       default y if SMP
+       help
+         ARMv6 architecture deprecates use of the SWP/SWPB instructions.
+         ARMv7 multiprocessing extensions introduce the ability to disable
+         these instructions, triggering an undefined instruction exception
+         when executed. Say Y here to enable software emulation of these
+         instructions for userspace (not kernel) using LDREX/STREX.
+         Also creates /proc/cpu/swp_emulation for statistics.
+
+         In some older versions of glibc [<=2.8] SWP is used during futex
+         trylock() operations with the assumption that the code will not
+         be preempted. This invalid assumption may be more likely to fail
+         with SWP emulation enabled, leading to deadlock of the user
+         application.
+
+         NOTE: when accessing uncached shared regions, LDREX/STREX rely
+         on an external transaction monitoring block called a global
+         monitor to maintain update atomicity. If your system does not
+         implement a global monitor, this option can cause programs that
+         perform SWP operations to uncached memory to deadlock.
+
+         If unsure, say Y.
+
 config CPU_BIG_ENDIAN
        bool "Build big-endian kernel"
        depends on ARCH_SUPPORTS_BIG_ENDIAN
@@ -772,7 +813,7 @@ config CACHE_L2X0
        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
                   REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \
                   ARCH_NOMADIK || ARCH_OMAP4 || ARCH_S5PV310 || ARCH_TEGRA || \
-                  ARCH_U8500 || ARCH_VEXPRESS_CA9X4
+                  ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || ARCH_SHMOBILE
        default y
        select OUTER_CACHE
        select OUTER_CACHE_SYNC
@@ -789,7 +830,7 @@ config CACHE_PL310
 
 config CACHE_TAUROS2
        bool "Enable the Tauros2 L2 cache controller"
-       depends on (ARCH_DOVE || ARCH_MMP)
+       depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4)
        default y
        select OUTER_CACHE
        help