Merge branch 'devel-stable' into devel

[pandora-kernel.git] / arch / arm / mm / Kconfig

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 3302730..346ae14 100644 (file)
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -572,6 +572,8 @@ config CPU_TLB_V6
 config CPU_TLB_V7
        bool
 
+config VERIFY_PERMISSION_FAULT
+       bool
 endif
 
 config CPU_HAS_ASID
@@ -736,6 +738,12 @@ config NEEDS_SYSCALL_FOR_CMPXCHG
 config OUTER_CACHE
        bool
 
+config OUTER_CACHE_SYNC
+       bool
+       help
+         The outer cache has a outer_cache_fns.sync function pointer
+         that can be used to drain the write buffer of the outer cache.
+
 config CACHE_FEROCEON_L2
        bool "Enable the Feroceon L2 cache controller"
        depends on ARCH_KIRKWOOD || ARCH_MV78XX0
@@ -758,12 +766,13 @@ config CACHE_L2X0
                   ARCH_NOMADIK || ARCH_OMAP4 || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
        default y
        select OUTER_CACHE
+       select OUTER_CACHE_SYNC
        help
          This option enables the L2x0 PrimeCell.
 
 config CACHE_TAUROS2
        bool "Enable the Tauros2 L2 cache controller"
-       depends on ARCH_DOVE
+       depends on (ARCH_DOVE || ARCH_MMP)
        default y
        select OUTER_CACHE
        help
@@ -801,3 +810,9 @@ config ARM_DMA_MEM_BUFFERABLE
          behaviour.  Therefore, we offer this as an option.
 
          You are recommended say 'Y' here and debug any affected drivers.
+
+config ARCH_HAS_BARRIERS
+       bool
+       help
+         This option allows the use of custom mandatory barriers
+         included via the mach/barriers.h file.