{ /* CLCD */
.dev_id = "ct:clcd",
.clk = &osc1_clk,
+ }, { /* SP804 timers */
+ .dev_id = "sp804",
+ .con_id = "ct-timer0",
+ .clk = &ct_sp804_clk,
}, { /* SP804 timers */
.dev_id = "sp804",
.con_id = "ct-timer1",
for (i = 0; i < ncores; ++i)
set_cpu_possible(i, true);
+
+ set_smp_cross_call(gic_raise_softirq);
}
static void ct_ca9x4_smp_enable(unsigned int max_cpus)