Merge branch 'for-linus' of git://git.open-osd.org/linux-open-osd

[pandora-kernel.git] / arch / arm / mach-versatile / core.c

diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 606e046..eb7ffa0 100644 (file)
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -51,6 +51,7 @@
 #include <asm/hardware/timer-sp.h>
 
 #include <plat/clcd.h>
+#include <plat/fpga-irq.h>
 #include <plat/sched_clock.h>
 
 #include "core.h"
@@ -64,47 +65,12 @@
 #define VA_VIC_BASE            __io_address(VERSATILE_VIC_BASE)
 #define VA_SIC_BASE            __io_address(VERSATILE_SIC_BASE)
 
-static void sic_mask_irq(struct irq_data *d)
-{
-       unsigned int irq = d->irq - IRQ_SIC_START;
-
-       writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
-}
-
-static void sic_unmask_irq(struct irq_data *d)
-{
-       unsigned int irq = d->irq - IRQ_SIC_START;
-
-       writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET);
-}
-
-static struct irq_chip sic_chip = {
-       .name           = "SIC",
-       .irq_ack        = sic_mask_irq,
-       .irq_mask       = sic_mask_irq,
-       .irq_unmask     = sic_unmask_irq,
+static struct fpga_irq_data sic_irq = {
+       .base           = VA_SIC_BASE,
+       .irq_start      = IRQ_SIC_START,
+       .chip.name      = "SIC",
 };
 
-static void
-sic_handle_irq(unsigned int irq, struct irq_desc *desc)
-{
-       unsigned long status = readl(VA_SIC_BASE + SIC_IRQ_STATUS);
-
-       if (status == 0) {
-               do_bad_IRQ(irq, desc);
-               return;
-       }
-
-       do {
-               irq = ffs(status) - 1;
-               status &= ~(1 << irq);
-
-               irq += IRQ_SIC_START;
-
-               generic_handle_irq(irq);
-       } while (status);
-}
-
 #if 1
 #define IRQ_MMCI0A     IRQ_VICSOURCE22
 #define IRQ_AACI       IRQ_VICSOURCE24
@@ -119,22 +85,11 @@ sic_handle_irq(unsigned int irq, struct irq_desc *desc)
 
 void __init versatile_init_irq(void)
 {
-       unsigned int i;
-
        vic_init(VA_VIC_BASE, IRQ_VIC_START, ~0, 0);
 
-       set_irq_chained_handler(IRQ_VICSOURCE31, sic_handle_irq);
-
-       /* Do second interrupt controller */
        writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
 
-       for (i = IRQ_SIC_START; i <= IRQ_SIC_END; i++) {
-               if ((PIC_MASK & (1 << (i - IRQ_SIC_START))) == 0) {
-                       set_irq_chip(i, &sic_chip);
-                       set_irq_handler(i, handle_level_irq);
-                       set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-               }
-       }
+       fpga_irq_init(IRQ_VICSOURCE31, ~PIC_MASK, &sic_irq);
 
        /*
         * Interrupts on secondary controller from 0 to 8 are routed to
@@ -634,53 +589,35 @@ static struct pl022_ssp_controller ssp0_plat_data = {
 };
 
 #define AACI_IRQ       { IRQ_AACI, NO_IRQ }
-#define AACI_DMA       { 0x80, 0x81 }
 #define MMCI0_IRQ      { IRQ_MMCI0A,IRQ_SIC_MMCI0B }
-#define MMCI0_DMA      { 0x84, 0 }
 #define KMI0_IRQ       { IRQ_SIC_KMI0, NO_IRQ }
-#define KMI0_DMA       { 0, 0 }
 #define KMI1_IRQ       { IRQ_SIC_KMI1, NO_IRQ }
-#define KMI1_DMA       { 0, 0 }
 
 /*
  * These devices are connected directly to the multi-layer AHB switch
  */
 #define SMC_IRQ                { NO_IRQ, NO_IRQ }
-#define SMC_DMA                { 0, 0 }
 #define MPMC_IRQ       { NO_IRQ, NO_IRQ }
-#define MPMC_DMA       { 0, 0 }
 #define CLCD_IRQ       { IRQ_CLCDINT, NO_IRQ }
-#define CLCD_DMA       { 0, 0 }
 #define DMAC_IRQ       { IRQ_DMAINT, NO_IRQ }
-#define DMAC_DMA       { 0, 0 }
 
 /*
  * These devices are connected via the core APB bridge
  */
 #define SCTL_IRQ       { NO_IRQ, NO_IRQ }
-#define SCTL_DMA       { 0, 0 }
 #define WATCHDOG_IRQ   { IRQ_WDOGINT, NO_IRQ }
-#define WATCHDOG_DMA   { 0, 0 }
 #define GPIO0_IRQ      { IRQ_GPIOINT0, NO_IRQ }
-#define GPIO0_DMA      { 0, 0 }
 #define GPIO1_IRQ      { IRQ_GPIOINT1, NO_IRQ }
-#define GPIO1_DMA      { 0, 0 }
 #define RTC_IRQ                { IRQ_RTCINT, NO_IRQ }
-#define RTC_DMA                { 0, 0 }
 
 /*
  * These devices are connected via the DMA APB bridge
  */
 #define SCI_IRQ                { IRQ_SCIINT, NO_IRQ }
-#define SCI_DMA                { 7, 6 }
 #define UART0_IRQ      { IRQ_UARTINT0, NO_IRQ }
-#define UART0_DMA      { 15, 14 }
 #define UART1_IRQ      { IRQ_UARTINT1, NO_IRQ }
-#define UART1_DMA      { 13, 12 }
 #define UART2_IRQ      { IRQ_UARTINT2, NO_IRQ }
-#define UART2_DMA      { 11, 10 }
 #define SSP_IRQ                { IRQ_SSPINT, NO_IRQ }
-#define SSP_DMA                { 9, 8 }
 
 /* FPGA Primecells */
 AMBA_DEVICE(aaci,  "fpga:04", AACI,     NULL);