Merge branch 'for-linus' of git://oss.sgi.com/xfs/xfs

[pandora-kernel.git] / arch / arm / mach-spear3xx / include / mach / spear320.h

diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
index 53677e4..940f0d8 100644 (file)
--- a/arch/arm/mach-spear3xx/include/mach/spear320.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear320.h
@@ -16,54 +16,25 @@
 #ifndef __MACH_SPEAR320_H
 #define __MACH_SPEAR320_H
 
-#define SPEAR320_EMI_CTRL_BASE         0x40000000
-#define SPEAR320_EMI_CTRL_SIZE         0x08000000
+#define SPEAR320_EMI_CTRL_BASE         UL(0x40000000)
+#define SPEAR320_FSMC_BASE             UL(0x4C000000)
+#define SPEAR320_NAND_BASE             UL(0x50000000)
+#define SPEAR320_I2S_BASE              UL(0x60000000)
+#define SPEAR320_SDHCI_BASE            UL(0x70000000)
+#define SPEAR320_CLCD_BASE             UL(0x90000000)
+#define SPEAR320_PAR_PORT_BASE         UL(0xA0000000)
+#define SPEAR320_CAN0_BASE             UL(0xA1000000)
+#define SPEAR320_CAN1_BASE             UL(0xA2000000)
+#define SPEAR320_UART1_BASE            UL(0xA3000000)
+#define SPEAR320_UART2_BASE            UL(0xA4000000)
+#define SPEAR320_SSP0_BASE             UL(0xA5000000)
+#define SPEAR320_SSP1_BASE             UL(0xA6000000)
+#define SPEAR320_I2C_BASE              UL(0xA7000000)
+#define SPEAR320_PWM_BASE              UL(0xA8000000)
+#define SPEAR320_SMII0_BASE            UL(0xAA000000)
+#define SPEAR320_SMII1_BASE            UL(0xAB000000)
+#define SPEAR320_SOC_CONFIG_BASE       UL(0xB3000000)
 
-#define SPEAR320_FSMC_BASE             0x4C000000
-#define SPEAR320_FSMC_SIZE             0x01000000
-
-#define SPEAR320_I2S_BASE              0x60000000
-#define SPEAR320_I2S_SIZE              0x10000000
-
-#define SPEAR320_SDIO_BASE             0x70000000
-#define SPEAR320_SDIO_SIZE             0x10000000
-
-#define SPEAR320_CLCD_BASE             0x90000000
-#define SPEAR320_CLCD_SIZE             0x10000000
-
-#define SPEAR320_PAR_PORT_BASE         0xA0000000
-#define SPEAR320_PAR_PORT_SIZE         0x01000000
-
-#define SPEAR320_CAN0_BASE             0xA1000000
-#define SPEAR320_CAN0_SIZE             0x01000000
-
-#define SPEAR320_CAN1_BASE             0xA2000000
-#define SPEAR320_CAN1_SIZE             0x01000000
-
-#define SPEAR320_UART1_BASE            0xA3000000
-#define SPEAR320_UART2_BASE            0xA4000000
-#define SPEAR320_UART_SIZE             0x01000000
-
-#define SPEAR320_SSP0_BASE             0xA5000000
-#define SPEAR320_SSP0_SIZE             0x01000000
-
-#define SPEAR320_SSP1_BASE             0xA6000000
-#define SPEAR320_SSP1_SIZE             0x01000000
-
-#define SPEAR320_I2C_BASE              0xA7000000
-#define SPEAR320_I2C_SIZE              0x01000000
-
-#define SPEAR320_PWM_BASE              0xA8000000
-#define SPEAR320_PWM_SIZE              0x01000000
-
-#define SPEAR320_SMII0_BASE            0xAA000000
-#define SPEAR320_SMII0_SIZE            0x01000000
-
-#define SPEAR320_SMII1_BASE            0xAB000000
-#define SPEAR320_SMII1_SIZE            0x01000000
-
-#define SPEAR320_SOC_CONFIG_BASE       0xB3000000
-#define SPEAR320_SOC_CONFIG_SIZE       0x00000070
 /* Interrupt registers offsets and masks */
 #define INT_STS_MASK_REG               0x04
 #define INT_CLR_MASK_REG               0x04
@@ -74,7 +45,7 @@
 #define EMI_IRQ_MASK                   (1 << 7)
 #define CLCD_IRQ_MASK                  (1 << 8)
 #define SPP_IRQ_MASK                   (1 << 9)
-#define SDIO_IRQ_MASK                  (1 << 10)
+#define SDHCI_IRQ_MASK                 (1 << 10)
 #define CAN_U_IRQ_MASK                 (1 << 11)
 #define CAN_L_IRQ_MASK                 (1 << 12)
 #define UART1_IRQ_MASK                 (1 << 13)