#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/fb.h>
+#include <plat/fimc-core.h>
#include <plat/sdhci.h>
/* Following are default values for UCON, ULCON and UFCON UART registers */
/* Frame Buffer */
static struct s3c_fb_pd_win aquila_fb_win0 = {
.win_mode = {
- .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
.left_margin = 16,
.right_margin = 16,
.upper_margin = 3,
static struct s3c_fb_pd_win aquila_fb_win1 = {
.win_mode = {
- .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
.left_margin = 16,
.right_margin = 16,
.upper_margin = 3,
&s3c_device_hsmmc0,
&s3c_device_hsmmc1,
&s3c_device_hsmmc2,
+ &s5p_device_fimc0,
+ &s5p_device_fimc1,
+ &s5p_device_fimc2,
};
static void __init aquila_map_io(void)
/* SDHCI */
aquila_setup_sdhci();
+ s3c_fimc_setname(0, "s5p-fimc");
+ s3c_fimc_setname(1, "s5p-fimc");
+ s3c_fimc_setname(2, "s5p-fimc");
+
/* FB */
s3c_fb_set_platdata(&aquila_lcd_pdata);