Merge branches 'irq-core-for-linus' and 'core-locking-for-linus' of git://git.kernel...

[pandora-kernel.git] / arch / arm / mach-s5pc100 / clock.c

diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index 306ae74..2d4a761 100644 (file)
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -273,24 +273,6 @@ static struct clksrc_clk clk_div_hdmi = {
        .reg_div = { .reg = S5P_CLK_DIV3, .shift = 28, .size = 4 },
 };
 
-static int s5pc100_epll_enable(struct clk *clk, int enable)
-{
-       unsigned int ctrlbit = clk->ctrlbit;
-       unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit;
-
-       if (enable)
-               __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON);
-       else
-               __raw_writel(epll_con, S5P_EPLL_CON);
-
-       return 0;
-}
-
-static unsigned long s5pc100_epll_get_rate(struct clk *clk)
-{
-       return clk->rate;
-}
-
 static u32 epll_div[][4] = {
        { 32750000,     131, 3, 4 },
        { 32768000,     131, 3, 4 },
@@ -341,13 +323,16 @@ static int s5pc100_epll_set_rate(struct clk *clk, unsigned long rate)
 
        __raw_writel(epll_con, S5P_EPLL_CON);
 
+       printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n",
+                       clk->rate, rate);
+
        clk->rate = rate;
 
        return 0;
 }
 
 static struct clk_ops s5pc100_epll_ops = {
-       .get_rate = s5pc100_epll_get_rate,
+       .get_rate = s5p_epll_get_rate,
        .set_rate = s5pc100_epll_set_rate,
 };
 
@@ -691,55 +676,55 @@ static struct clk init_clocks_disable[] = {
        }, {
                .name           = "iis",
                .id             = 0,
-               .parent         = &clk_div_d1_bus.clk,
+               .parent         = &clk_div_pclkd1.clk,
                .enable         = s5pc100_d1_5_ctrl,
                .ctrlbit        = (1 << 0),
        }, {
                .name           = "iis",
                .id             = 1,
-               .parent         = &clk_div_d1_bus.clk,
+               .parent         = &clk_div_pclkd1.clk,
                .enable         = s5pc100_d1_5_ctrl,
                .ctrlbit        = (1 << 1),
        }, {
                .name           = "iis",
                .id             = 2,
-               .parent         = &clk_div_d1_bus.clk,
+               .parent         = &clk_div_pclkd1.clk,
                .enable         = s5pc100_d1_5_ctrl,
                .ctrlbit        = (1 << 2),
        }, {
                .name           = "ac97",
                .id             = -1,
-               .parent         = &clk_div_d1_bus.clk,
+               .parent         = &clk_div_pclkd1.clk,
                .enable         = s5pc100_d1_5_ctrl,
                .ctrlbit        = (1 << 3),
        }, {
                .name           = "pcm",
                .id             = 0,
-               .parent         = &clk_div_d1_bus.clk,
+               .parent         = &clk_div_pclkd1.clk,
                .enable         = s5pc100_d1_5_ctrl,
                .ctrlbit        = (1 << 4),
        }, {
                .name           = "pcm",
                .id             = 1,
-               .parent         = &clk_div_d1_bus.clk,
+               .parent         = &clk_div_pclkd1.clk,
                .enable         = s5pc100_d1_5_ctrl,
                .ctrlbit        = (1 << 5),
        }, {
                .name           = "spdif",
                .id             = -1,
-               .parent         = &clk_div_d1_bus.clk,
+               .parent         = &clk_div_pclkd1.clk,
                .enable         = s5pc100_d1_5_ctrl,
                .ctrlbit        = (1 << 6),
        }, {
                .name           = "adc",
                .id             = -1,
-               .parent         = &clk_div_d1_bus.clk,
+               .parent         = &clk_div_pclkd1.clk,
                .enable         = s5pc100_d1_5_ctrl,
                .ctrlbit        = (1 << 7),
        }, {
                .name           = "keypad",
                .id             = -1,
-               .parent         = &clk_div_d1_bus.clk,
+               .parent         = &clk_div_pclkd1.clk,
                .enable         = s5pc100_d1_5_ctrl,
                .ctrlbit        = (1 << 8),
        }, {
@@ -1261,7 +1246,7 @@ void __init_or_cpufreq s5pc100_setup_clocks(void)
        unsigned int ptr;
 
        /* Set S5PC100 functions for clk_fout_epll */
-       clk_fout_epll.enable = s5pc100_epll_enable;
+       clk_fout_epll.enable = s5p_epll_enable;
        clk_fout_epll.ops = &s5pc100_epll_ops;
 
        printk(KERN_DEBUG "%s: registering clocks\n", __func__);