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Merge branch 'for-linus' of git://git.infradead.org/users/eparis/notify
[pandora-kernel.git]
/
arch
/
arm
/
mach-s5p64x0
/
clock-s5p6450.c
diff --git
a/arch/arm/mach-s5p64x0/clock-s5p6450.c
b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index
f9afb05
..
7dbf3c9
100644
(file)
--- a/
arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/
arch/arm/mach-s5p64x0/clock-s5p6450.c
@@
-80,13
+80,16
@@
static int s5p6450_epll_set_rate(struct clk *clk, unsigned long rate)
__raw_writel(epll_con, S5P64X0_EPLL_CON);
__raw_writel(epll_con_k, S5P64X0_EPLL_CON_K);
__raw_writel(epll_con, S5P64X0_EPLL_CON);
__raw_writel(epll_con_k, S5P64X0_EPLL_CON_K);
+ printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n",
+ clk->rate, rate);
+
clk->rate = rate;
return 0;
}
static struct clk_ops s5p6450_epll_ops = {
clk->rate = rate;
return 0;
}
static struct clk_ops s5p6450_epll_ops = {
- .get_rate = s5p
64x0
_epll_get_rate,
+ .get_rate = s5p_epll_get_rate,
.set_rate = s5p6450_epll_set_rate,
};
.set_rate = s5p6450_epll_set_rate,
};
@@
-185,6
+188,12
@@
static struct clk init_clocks_disable[] = {
.parent = &clk_hclk_low.clk,
.enable = s5p64x0_hclk0_ctrl,
.ctrlbit = (1 << 3),
.parent = &clk_hclk_low.clk,
.enable = s5p64x0_hclk0_ctrl,
.ctrlbit = (1 << 3),
+ }, {
+ .name = "pdma",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 12),
}, {
.name = "hsmmc",
.id = 0,
}, {
.name = "hsmmc",
.id = 0,
@@
-282,12
+291,6
@@
static struct clk init_clocks[] = {
.parent = &clk_hclk.clk,
.enable = s5p64x0_hclk0_ctrl,
.ctrlbit = (1 << 21),
.parent = &clk_hclk.clk,
.enable = s5p64x0_hclk0_ctrl,
.ctrlbit = (1 << 21),
- }, {
- .name = "dma",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p64x0_hclk0_ctrl,
- .ctrlbit = (1 << 12),
}, {
.name = "uart",
.id = 0,
}, {
.name = "uart",
.id = 0,
@@
-581,7
+584,7
@@
void __init_or_cpufreq s5p6450_setup_clocks(void)
/* Set S5P6450 functions for clk_fout_epll */
/* Set S5P6450 functions for clk_fout_epll */
- clk_fout_epll.enable = s5p
64x0
_epll_enable;
+ clk_fout_epll.enable = s5p_epll_enable;
clk_fout_epll.ops = &s5p6450_epll_ops;
clk_48m.enable = s5p64x0_clk48m_ctrl;
clk_fout_epll.ops = &s5p6450_epll_ops;
clk_48m.enable = s5p64x0_clk48m_ctrl;