/* clock selections */
-static struct clk clk_i2s_ext = {
- .name = "i2s-ext",
-};
-
/* armdiv
*
* this clock is sourced from msysclk and can have a number of
* divider values applied to it to then be fed into armclk.
+ * The real clock definition is done in s3c2443-clock.c,
+ * only the armdiv divisor table must be defined here.
*/
-/* armdiv divisor table */
-
static unsigned int armdiv[16] = {
[S3C2443_CLKDIV0_ARMDIV_1 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 1,
[S3C2443_CLKDIV0_ARMDIV_2 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 2,
[S3C2443_CLKDIV0_ARMDIV_16 >> S3C2443_CLKDIV0_ARMDIV_SHIFT] = 16,
};
-static inline unsigned int s3c2443_fclk_div(unsigned long clkcon0)
-{
- clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
-
- return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT];
-}
-
-static unsigned long s3c2443_armclk_roundrate(struct clk *clk,
- unsigned long rate)
-{
- unsigned long parent = clk_get_rate(clk->parent);
- unsigned long calc;
- unsigned best = 256; /* bigger than any value */
- unsigned div;
- int ptr;
-
- for (ptr = 0; ptr < ARRAY_SIZE(armdiv); ptr++) {
- div = armdiv[ptr];
- calc = parent / div;
- if (calc <= rate && div < best)
- best = div;
- }
-
- return parent / best;
-}
-
-static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate)
-{
- unsigned long parent = clk_get_rate(clk->parent);
- unsigned long calc;
- unsigned div;
- unsigned best = 256; /* bigger than any value */
- int ptr;
- int val = -1;
-
- for (ptr = 0; ptr < ARRAY_SIZE(armdiv); ptr++) {
- div = armdiv[ptr];
- calc = parent / div;
- if (calc <= rate && div < best) {
- best = div;
- val = ptr;
- }
- }
-
- if (val >= 0) {
- unsigned long clkcon0;
-
- clkcon0 = __raw_readl(S3C2443_CLKDIV0);
- clkcon0 &= ~S3C2443_CLKDIV0_ARMDIV_MASK;
- clkcon0 |= val << S3C2443_CLKDIV0_ARMDIV_SHIFT;
- __raw_writel(clkcon0, S3C2443_CLKDIV0);
- }
-
- return (val == -1) ? -EINVAL : 0;
-}
-
-static struct clk clk_armdiv = {
- .name = "armdiv",
- .parent = &clk_msysclk.clk,
- .ops = &(struct clk_ops) {
- .round_rate = s3c2443_armclk_roundrate,
- .set_rate = s3c2443_armclk_setrate,
- },
-};
-
-/* armclk
- *
- * this is the clock fed into the ARM core itself, from armdiv or from hclk.
- */
-
-static struct clk *clk_arm_sources[] = {
- [0] = &clk_armdiv,
- [1] = &clk_h,
-};
-
-static struct clksrc_clk clk_arm = {
- .clk = {
- .name = "armclk",
- },
- .sources = &(struct clksrc_sources) {
- .sources = clk_arm_sources,
- .nr_sources = ARRAY_SIZE(clk_arm_sources),
- },
- .reg_src = { .reg = S3C2443_CLKDIV0, .size = 1, .shift = 13 },
-};
-
/* hsspi
*
* high-speed spi clock, sourced from esysclk
static struct clksrc_clk clk_hsspi = {
.clk = {
- .name = "hsspi",
+ .name = "hsspi-if",
.parent = &clk_esysclk.clk,
.ctrlbit = S3C2443_SCLKCON_HSSPICLK,
.enable = s3c2443_clkcon_enable_s,
},
};
-/* i2s_eplldiv
- *
- * This clock is the output from the I2S divisor of ESYSCLK, and is separate
- * from the mux that comes after it (cannot merge into one single clock)
-*/
-
-static struct clksrc_clk clk_i2s_eplldiv = {
- .clk = {
- .name = "i2s-eplldiv",
- .parent = &clk_esysclk.clk,
- },
- .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, },
-};
-
-/* i2s-ref
- *
- * i2s bus reference clock, selectable from external, esysclk or epllref
- *
- * Note, this used to be two clocks, but was compressed into one.
-*/
-
-struct clk *clk_i2s_srclist[] = {
- [0] = &clk_i2s_eplldiv.clk,
- [1] = &clk_i2s_ext,
- [2] = &clk_epllref.clk,
- [3] = &clk_epllref.clk,
-};
-
-static struct clksrc_clk clk_i2s = {
- .clk = {
- .name = "i2s-if",
- .ctrlbit = S3C2443_SCLKCON_I2SCLK,
- .enable = s3c2443_clkcon_enable_s,
-
- },
- .sources = &(struct clksrc_sources) {
- .sources = clk_i2s_srclist,
- .nr_sources = ARRAY_SIZE(clk_i2s_srclist),
- },
- .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 },
-};
-
/* standard clock definitions */
static struct clk init_clocks_off[] = {
.parent = &clk_p,
.enable = s3c2443_clkcon_enable_p,
.ctrlbit = S3C2443_PCLKCON_SDI,
- }, {
- .name = "iis",
- .parent = &clk_p,
- .enable = s3c2443_clkcon_enable_p,
- .ctrlbit = S3C2443_PCLKCON_IIS,
}, {
.name = "spi",
.devname = "s3c2410-spi.0",
}
};
-static struct clk init_clocks[] = {
-};
-
/* clocks to add straight away */
static struct clksrc_clk *clksrcs[] __initdata = {
- &clk_arm,
- &clk_i2s_eplldiv,
- &clk_i2s,
&clk_hsspi,
&clk_hsmmc_div,
};
static struct clk *clks[] __initdata = {
&clk_hsmmc,
- &clk_armdiv,
};
void __init_or_cpufreq s3c2443_setup_clocks(void)
{
- s3c2443_common_setup_clocks(s3c2443_get_mpll, s3c2443_fclk_div);
+ s3c2443_common_setup_clocks(s3c2443_get_mpll);
}
void __init s3c2443_init_clocks(int xtal)
clk_epll.rate = s3c2443_get_epll(epllcon, xtal);
clk_epll.parent = &clk_epllref.clk;
- s3c2443_common_init_clocks(xtal, s3c2443_get_mpll, s3c2443_fclk_div);
+ s3c2443_common_init_clocks(xtal, s3c2443_get_mpll,
+ armdiv, ARRAY_SIZE(armdiv),
+ S3C2443_CLKDIV0_ARMDIV_MASK);
s3c2443_setup_clocks();
for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
s3c_register_clksrc(clksrcs[ptr], 1);
- /* register clocks from clock array */
-
- s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
-
/* We must be careful disabling the clocks we are not intending to
* be using at boot time, as subsystems such as the LCD which do
* their own DMA requests to the bus can cause the system to lockup
git.openpandora.org / pandora-kernel.git / blobdiff