Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[pandora-kernel.git] / arch / arm / mach-omap2 / pm34xx.c
index d2b940c..75c0cd1 100644 (file)
@@ -32,7 +32,6 @@
 #include <plat/sram.h>
 #include <plat/clockdomain.h>
 #include <plat/powerdomain.h>
-#include <plat/control.h>
 #include <plat/serial.h>
 #include <plat/sdrc.h>
 #include <plat/prcm.h>
 #include "prm.h"
 #include "pm.h"
 #include "sdrc.h"
+#include "control.h"
 
 /* Scratchpad offsets */
-#define OMAP343X_TABLE_ADDRESS_OFFSET     0x31
-#define OMAP343X_TABLE_VALUE_OFFSET       0x30
-#define OMAP343X_CONTROL_REG_VALUE_OFFSET  0x32
+#define OMAP343X_TABLE_ADDRESS_OFFSET     0xc4
+#define OMAP343X_TABLE_VALUE_OFFSET       0xc0
+#define OMAP343X_CONTROL_REG_VALUE_OFFSET  0xc8
 
 struct power_state {
        struct powerdomain *pwrdm;
@@ -310,7 +310,7 @@ static void restore_control_register(u32 val)
 /* Function to restore the table entry that was modified for enabling MMU */
 static void restore_table_entry(void)
 {
-       u32 *scratchpad_address;
+       void __iomem *scratchpad_address;
        u32 previous_value, control_reg_value;
        u32 *address;
 
@@ -388,6 +388,7 @@ void omap_sram_idle(void)
        /* PER */
        if (per_next_state < PWRDM_POWER_ON) {
                omap_uart_prepare_idle(2);
+               omap_uart_prepare_idle(3);
                omap2_gpio_prepare_for_idle(per_next_state);
                if (per_next_state == PWRDM_POWER_OFF)
                                omap3_per_save_context();
@@ -459,6 +460,7 @@ void omap_sram_idle(void)
                if (per_prev_state == PWRDM_POWER_OFF)
                        omap3_per_restore_context();
                omap_uart_resume_idle(2);
+               omap_uart_resume_idle(3);
        }
 
        /* Disable IO-PAD and IO-CHAIN wakeup */
@@ -676,6 +678,14 @@ static void __init omap3_d2d_idle(void)
 
 static void __init prcm_setup_regs(void)
 {
+       u32 omap3630_auto_uart4_mask = cpu_is_omap3630() ?
+                                       OMAP3630_AUTO_UART4_MASK : 0;
+       u32 omap3630_en_uart4_mask = cpu_is_omap3630() ?
+                                       OMAP3630_EN_UART4_MASK : 0;
+       u32 omap3630_grpsel_uart4_mask = cpu_is_omap3630() ?
+                                       OMAP3630_GRPSEL_UART4_MASK : 0;
+
+
        /* XXX Reset all wkdeps. This should be done when initializing
         * powerdomains */
        prm_write_mod_reg(0, OMAP3430_IVA2_MOD, PM_WKDEP);
@@ -762,6 +772,7 @@ static void __init prcm_setup_regs(void)
                CM_AUTOIDLE);
 
        cm_write_mod_reg(
+               omap3630_auto_uart4_mask |
                OMAP3430_AUTO_GPIO6_MASK |
                OMAP3430_AUTO_GPIO5_MASK |
                OMAP3430_AUTO_GPIO4_MASK |
@@ -838,14 +849,16 @@ static void __init prcm_setup_regs(void)
                                OMAP3430_DSS_MOD, PM_WKEN);
 
        /* Enable wakeups in PER */
-       prm_write_mod_reg(OMAP3430_EN_GPIO2_MASK | OMAP3430_EN_GPIO3_MASK |
+       prm_write_mod_reg(omap3630_en_uart4_mask |
+                         OMAP3430_EN_GPIO2_MASK | OMAP3430_EN_GPIO3_MASK |
                          OMAP3430_EN_GPIO4_MASK | OMAP3430_EN_GPIO5_MASK |
                          OMAP3430_EN_GPIO6_MASK | OMAP3430_EN_UART3_MASK |
                          OMAP3430_EN_MCBSP2_MASK | OMAP3430_EN_MCBSP3_MASK |
                          OMAP3430_EN_MCBSP4_MASK,
                          OMAP3430_PER_MOD, PM_WKEN);
        /* and allow them to wake up MPU */
-       prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2_MASK |
+       prm_write_mod_reg(omap3630_grpsel_uart4_mask |
+                         OMAP3430_GRPSEL_GPIO2_MASK |
                          OMAP3430_GRPSEL_GPIO3_MASK |
                          OMAP3430_GRPSEL_GPIO4_MASK |
                          OMAP3430_GRPSEL_GPIO5_MASK |