Merge git://git.kernel.org/pub/scm/linux/kernel/git/mason/btrfs-unstable

[pandora-kernel.git] / arch / arm / mach-omap2 / pm34xx.c

diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 3d6a00e..0c5e3a4 100644 (file)
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -29,6 +29,7 @@
 #include <linux/delay.h>
 #include <linux/slab.h>
 #include <linux/console.h>
+#include <trace/events/power.h>
 
 #include <plat/sram.h>
 #include "clockdomain.h"
@@ -311,11 +312,6 @@ static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
        return IRQ_HANDLED;
 }
 
-static void restore_control_register(u32 val)
-{
-       __asm__ __volatile__ ("mcr p15, 0, %0, c1, c0, 0" : : "r" (val));
-}
-
 /* Function to restore the table entry that was modified for enabling MMU */
 static void restore_table_entry(void)
 {
@@ -337,7 +333,7 @@ static void restore_table_entry(void)
        control_reg_value = __raw_readl(scratchpad_address
                                        + OMAP343X_CONTROL_REG_VALUE_OFFSET);
        /* This will enable caches and prediction */
-       restore_control_register(control_reg_value);
+       set_cr(control_reg_value);
 }
 
 void omap_sram_idle(void)
@@ -519,8 +515,14 @@ static void omap3_pm_idle(void)
        if (omap_irq_pending() || need_resched())
                goto out;
 
+       trace_power_start(POWER_CSTATE, 1, smp_processor_id());
+       trace_cpu_idle(1, smp_processor_id());
+
        omap_sram_idle();
 
+       trace_power_end(smp_processor_id());
+       trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
+
 out:
        local_fiq_enable();
        local_irq_enable();
@@ -693,20 +695,6 @@ static void __init prcm_setup_regs(void)
        u32 omap3630_grpsel_uart4_mask = cpu_is_omap3630() ?
                                        OMAP3630_GRPSEL_UART4_MASK : 0;
 
-       /* XXX Reset all wkdeps. This should be done when initializing
-        * powerdomains */
-       omap2_prm_write_mod_reg(0, OMAP3430_IVA2_MOD, PM_WKDEP);
-       omap2_prm_write_mod_reg(0, MPU_MOD, PM_WKDEP);
-       omap2_prm_write_mod_reg(0, OMAP3430_DSS_MOD, PM_WKDEP);
-       omap2_prm_write_mod_reg(0, OMAP3430_NEON_MOD, PM_WKDEP);
-       omap2_prm_write_mod_reg(0, OMAP3430_CAM_MOD, PM_WKDEP);
-       omap2_prm_write_mod_reg(0, OMAP3430_PER_MOD, PM_WKDEP);
-       if (omap_rev() > OMAP3430_REV_ES1_0) {
-               omap2_prm_write_mod_reg(0, OMAP3430ES2_SGX_MOD, PM_WKDEP);
-               omap2_prm_write_mod_reg(0, OMAP3430ES2_USBHOST_MOD, PM_WKDEP);
-       } else
-               omap2_prm_write_mod_reg(0, GFX_MOD, PM_WKDEP);
-
        /* XXX This should be handled by hwmod code or SCM init code */
        omap_ctrl_writel(OMAP3430_AUTOIDLE_MASK, OMAP2_CONTROL_SYSCONFIG);
 
@@ -808,8 +796,7 @@ void omap3_pm_off_mode_enable(int enable)
                                pwrst->pwrdm == core_pwrdm &&
                                state == PWRDM_POWER_OFF) {
                        pwrst->next_state = PWRDM_POWER_RET;
-                       WARN_ONCE(1,
-                               "%s: Core OFF disabled due to errata i583\n",
+                       pr_warn("%s: Core OFF disabled due to errata i583\n",
                                __func__);
                } else {
                        pwrst->next_state = state;