Merge branch 'idle-release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb...
[pandora-kernel.git] / arch / arm / mach-omap2 / mcbsp.c
index 467aae2..f9c9df5 100644 (file)
 #include <plat/cpu.h>
 #include <plat/mcbsp.h>
 
-#include "mux.h"
+#include "control.h"
 
-static void omap2_mcbsp2_mux_setup(void)
+
+/* McBSP internal signal muxing functions */
+
+void omap2_mcbsp1_mux_clkr_src(u8 mux)
 {
-       omap_mux_init_signal("eac_ac_sclk.mcbsp2_clkx", OMAP_PULL_ENA);
-       omap_mux_init_signal("eac_ac_fs.mcbsp2_fsx", OMAP_PULL_ENA);
-       omap_mux_init_signal("eac_ac_din.mcbsp2_dr", OMAP_PULL_ENA);
-       omap_mux_init_signal("eac_ac_dout.mcbsp2_dx", OMAP_PULL_ENA);
-       omap_mux_init_gpio(117, OMAP_PULL_ENA);
-       /*
-        * TODO: Need to add MUX settings for OMAP 2430 SDP
-        */
+       u32 v;
+
+       v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
+       if (mux == CLKR_SRC_CLKR)
+               v &= ~OMAP2_MCBSP1_CLKR_MASK;
+       else if (mux == CLKR_SRC_CLKX)
+               v |= OMAP2_MCBSP1_CLKR_MASK;
+       omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
 }
+EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src);
 
-static void omap2_mcbsp_request(unsigned int id)
+void omap2_mcbsp1_mux_fsr_src(u8 mux)
 {
-       if (cpu_is_omap2420() && (id == OMAP_MCBSP2))
-               omap2_mcbsp2_mux_setup();
+       u32 v;
+
+       v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
+       if (mux == FSR_SRC_FSR)
+               v &= ~OMAP2_MCBSP1_FSR_MASK;
+       else if (mux == FSR_SRC_FSX)
+               v |= OMAP2_MCBSP1_FSR_MASK;
+       omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
 }
+EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
 
-static struct omap_mcbsp_ops omap2_mcbsp_ops = {
-       .request        = omap2_mcbsp_request,
-};
+/* McBSP CLKS source switching function */
+
+int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
+{
+       struct omap_mcbsp *mcbsp;
+       struct clk *fck_src;
+       char *fck_src_name;
+       int r;
+
+       if (!omap_mcbsp_check_valid_id(id)) {
+               pr_err("%s: Invalid id (%d)\n", __func__, id + 1);
+               return -EINVAL;
+       }
+       mcbsp = id_to_mcbsp_ptr(id);
+
+       if (fck_src_id == MCBSP_CLKS_PAD_SRC)
+               fck_src_name = "pad_fck";
+       else if (fck_src_id == MCBSP_CLKS_PRCM_SRC)
+               fck_src_name = "prcm_fck";
+       else
+               return -EINVAL;
+
+       fck_src = clk_get(mcbsp->dev, fck_src_name);
+       if (IS_ERR_OR_NULL(fck_src)) {
+               pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
+                      fck_src_name);
+               return -EINVAL;
+       }
+
+       clk_disable(mcbsp->fclk);
+
+       r = clk_set_parent(mcbsp->fclk, fck_src);
+       if (IS_ERR_VALUE(r)) {
+               pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
+                      "clks", fck_src_name);
+               clk_put(fck_src);
+               return -EINVAL;
+       }
+
+       clk_enable(mcbsp->fclk);
+
+       clk_put(fck_src);
+
+       return 0;
+}
+EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
+
+
+/* Platform data */
 
 #ifdef CONFIG_ARCH_OMAP2420
 static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
@@ -55,7 +112,6 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
                .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
        },
        {
                .phys_base      = OMAP24XX_MCBSP2_BASE,
@@ -63,7 +119,6 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
                .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
        },
 };
 #define OMAP2420_MCBSP_PDATA_SZ                ARRAY_SIZE(omap2420_mcbsp_pdata)
@@ -82,7 +137,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
                .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
        },
        {
                .phys_base      = OMAP24XX_MCBSP2_BASE,
@@ -90,7 +144,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
                .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
        },
        {
                .phys_base      = OMAP2430_MCBSP3_BASE,
@@ -98,7 +151,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
                .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
        },
        {
                .phys_base      = OMAP2430_MCBSP4_BASE,
@@ -106,7 +158,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
                .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
        },
        {
                .phys_base      = OMAP2430_MCBSP5_BASE,
@@ -114,7 +165,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
                .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
        },
 };
 #define OMAP2430_MCBSP_PDATA_SZ                ARRAY_SIZE(omap2430_mcbsp_pdata)
@@ -133,7 +183,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP1_TX,
                .rx_irq         = INT_24XX_MCBSP1_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP1_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
                .buffer_size    = 0x80, /* The FIFO has 128 locations */
        },
        {
@@ -143,7 +192,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP2_TX,
                .rx_irq         = INT_24XX_MCBSP2_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP2_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
                .buffer_size    = 0x500, /* The FIFO has 1024 + 256 locations */
        },
        {
@@ -153,7 +201,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP3_TX,
                .rx_irq         = INT_24XX_MCBSP3_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP3_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
                .buffer_size    = 0x80, /* The FIFO has 128 locations */
        },
        {
@@ -162,7 +209,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP4_TX,
                .rx_irq         = INT_24XX_MCBSP4_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP4_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
                .buffer_size    = 0x80, /* The FIFO has 128 locations */
        },
        {
@@ -171,7 +217,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
                .dma_tx_sync    = OMAP24XX_DMA_MCBSP5_TX,
                .rx_irq         = INT_24XX_MCBSP5_IRQ_RX,
                .tx_irq         = INT_24XX_MCBSP5_IRQ_TX,
-               .ops            = &omap2_mcbsp_ops,
                .buffer_size    = 0x80, /* The FIFO has 128 locations */
        },
 };
@@ -189,28 +234,24 @@ static struct omap_mcbsp_platform_data omap44xx_mcbsp_pdata[] = {
                .dma_rx_sync    = OMAP44XX_DMA_MCBSP1_RX,
                .dma_tx_sync    = OMAP44XX_DMA_MCBSP1_TX,
                .tx_irq         = OMAP44XX_IRQ_MCBSP1,
-               .ops            = &omap2_mcbsp_ops,
        },
        {
                .phys_base      = OMAP44XX_MCBSP2_BASE,
                .dma_rx_sync    = OMAP44XX_DMA_MCBSP2_RX,
                .dma_tx_sync    = OMAP44XX_DMA_MCBSP2_TX,
                .tx_irq         = OMAP44XX_IRQ_MCBSP2,
-               .ops            = &omap2_mcbsp_ops,
        },
        {
                .phys_base      = OMAP44XX_MCBSP3_BASE,
                .dma_rx_sync    = OMAP44XX_DMA_MCBSP3_RX,
                .dma_tx_sync    = OMAP44XX_DMA_MCBSP3_TX,
                .tx_irq         = OMAP44XX_IRQ_MCBSP3,
-               .ops            = &omap2_mcbsp_ops,
        },
        {
                .phys_base      = OMAP44XX_MCBSP4_BASE,
                .dma_rx_sync    = OMAP44XX_DMA_MCBSP4_RX,
                .dma_tx_sync    = OMAP44XX_DMA_MCBSP4_TX,
                .tx_irq         = OMAP44XX_IRQ_MCBSP4,
-               .ops            = &omap2_mcbsp_ops,
        },
 };
 #define OMAP44XX_MCBSP_PDATA_SZ                ARRAY_SIZE(omap44xx_mcbsp_pdata)