Merge branch 'for-2.6.27' of git://linux-nfs.org/~bfields/linux

[pandora-kernel.git] / arch / arm / mach-omap2 / cm-regbits-34xx.h

diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 3c38395..ee4c0ca 100644 (file)
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -72,7 +72,8 @@
 #define OMAP3430_ST_IVA2                               (1 << 0)
 
 /* CM_IDLEST_PLL_IVA2 */
-#define OMAP3430_ST_IVA2_CLK                           (1 << 0)
+#define OMAP3430_ST_IVA2_CLK_SHIFT                     0
+#define OMAP3430_ST_IVA2_CLK_MASK                      (1 << 0)
 
 /* CM_AUTOIDLE_PLL_IVA2 */
 #define OMAP3430_AUTO_IVA2_DPLL_SHIFT                  0
@@ -115,10 +116,7 @@
 #define OMAP3430_ST_MPU                                        (1 << 0)
 
 /* CM_IDLEST_PLL_MPU */
-#define OMAP3430_ST_MPU_CLK                            (1 << 0)
-#define OMAP3430_ST_IVA2_CLK_MASK                      (1 << 0)
-
-/* CM_IDLEST_PLL_MPU */
+#define OMAP3430_ST_MPU_CLK_SHIFT                      0
 #define OMAP3430_ST_MPU_CLK_MASK                       (1 << 0)
 
 /* CM_AUTOIDLE_PLL_MPU */
@@ -408,8 +406,10 @@
 #define OMAP3430_ST_12M_CLK                            (1 << 4)
 #define OMAP3430_ST_48M_CLK                            (1 << 3)
 #define OMAP3430_ST_96M_CLK                            (1 << 2)
-#define OMAP3430_ST_PERIPH_CLK                         (1 << 1)
-#define OMAP3430_ST_CORE_CLK                           (1 << 0)
+#define OMAP3430_ST_PERIPH_CLK_SHIFT                   1
+#define OMAP3430_ST_PERIPH_CLK_MASK                    (1 << 1)
+#define OMAP3430_ST_CORE_CLK_SHIFT                     0
+#define OMAP3430_ST_CORE_CLK_MASK                      (1 << 0)
 
 /* CM_IDLEST2_CKGEN */
 #define OMAP3430ES2_ST_120M_CLK_SHIFT                  1
@@ -423,6 +423,10 @@
 #define OMAP3430_AUTO_CORE_DPLL_SHIFT                  0
 #define OMAP3430_AUTO_CORE_DPLL_MASK                   (0x7 << 0)
 
+/* CM_AUTOIDLE2_PLL */
+#define OMAP3430ES2_AUTO_PERIPH2_DPLL_SHIFT            0
+#define OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK             (0x7 << 0)
+
 /* CM_CLKSEL1_PLL */
 /* Note that OMAP3430_CORE_DPLL_CLKOUT_DIV_MASK was (0x3 << 27) on 3430ES1 */
 #define OMAP3430_CORE_DPLL_CLKOUT_DIV_SHIFT            27