Merge branch 'x86-olpc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...

[pandora-kernel.git] / arch / arm / mach-omap2 / clock44xx_data.c

diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 850ffc7..e8cb32f 100644 (file)
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -339,7 +339,8 @@ static struct clk abe_24m_fclk = {
        .name           = "abe_24m_fclk",
        .parent         = &dpll_abe_m2x2_ck,
        .ops            = &clkops_null,
-       .recalc         = &followparent_recalc,
+       .fixed_div      = 8,
+       .recalc         = &omap_fixed_divisor_recalc,
 };
 
 static const struct clksel_rate div3_1to4_rates[] = {
@@ -505,7 +506,8 @@ static struct clk ddrphy_ck = {
        .name           = "ddrphy_ck",
        .parent         = &dpll_core_m2_ck,
        .ops            = &clkops_null,
-       .recalc         = &followparent_recalc,
+       .fixed_div      = 2,
+       .recalc         = &omap_fixed_divisor_recalc,
 };
 
 static struct clk dpll_core_m5x2_ck = {
@@ -590,7 +592,8 @@ static struct clk dll_clk_div_ck = {
        .name           = "dll_clk_div_ck",
        .parent         = &dpll_core_m4x2_ck,
        .ops            = &clkops_null,
-       .recalc         = &followparent_recalc,
+       .fixed_div      = 2,
+       .recalc         = &omap_fixed_divisor_recalc,
 };
 
 static const struct clksel dpll_abe_m2_div[] = {
@@ -772,7 +775,8 @@ static struct clk per_hs_clk_div_ck = {
        .name           = "per_hs_clk_div_ck",
        .parent         = &dpll_abe_m3x2_ck,
        .ops            = &clkops_null,
-       .recalc         = &followparent_recalc,
+       .fixed_div      = 2,
+       .recalc         = &omap_fixed_divisor_recalc,
 };
 
 static const struct clksel per_hsd_byp_clk_mux_sel[] = {
@@ -940,6 +944,7 @@ static struct dpll_data dpll_unipro_dd = {
        .enable_mask    = OMAP4430_DPLL_EN_MASK,
        .autoidle_mask  = OMAP4430_AUTO_DPLL_MODE_MASK,
        .idlest_mask    = OMAP4430_ST_DPLL_CLK_MASK,
+       .sddiv_mask     = OMAP4430_DPLL_SD_DIV_MASK,
        .max_multiplier = OMAP4430_MAX_DPLL_MULT,
        .max_divider    = OMAP4430_MAX_DPLL_DIV,
        .min_divider    = 1,
@@ -985,14 +990,15 @@ static struct clk usb_hs_clk_div_ck = {
        .name           = "usb_hs_clk_div_ck",
        .parent         = &dpll_abe_m3x2_ck,
        .ops            = &clkops_null,
-       .recalc         = &followparent_recalc,
+       .fixed_div      = 3,
+       .recalc         = &omap_fixed_divisor_recalc,
 };
 
 /* DPLL_USB */
 static struct dpll_data dpll_usb_dd = {
        .mult_div1_reg  = OMAP4430_CM_CLKSEL_DPLL_USB,
        .clk_bypass     = &usb_hs_clk_div_ck,
-       .flags          = DPLL_J_TYPE | DPLL_NO_DCO_SEL,
+       .flags          = DPLL_J_TYPE,
        .clk_ref        = &sys_clkin_ck,
        .control_reg    = OMAP4430_CM_CLKMODE_DPLL_USB,
        .modes          = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
@@ -1065,21 +1071,24 @@ static struct clk func_12m_fclk = {
        .name           = "func_12m_fclk",
        .parent         = &dpll_per_m2x2_ck,
        .ops            = &clkops_null,
-       .recalc         = &followparent_recalc,
+       .fixed_div      = 16,
+       .recalc         = &omap_fixed_divisor_recalc,
 };
 
 static struct clk func_24m_clk = {
        .name           = "func_24m_clk",
        .parent         = &dpll_per_m2_ck,
        .ops            = &clkops_null,
-       .recalc         = &followparent_recalc,
+       .fixed_div      = 4,
+       .recalc         = &omap_fixed_divisor_recalc,
 };
 
 static struct clk func_24mc_fclk = {
        .name           = "func_24mc_fclk",
        .parent         = &dpll_per_m2x2_ck,
        .ops            = &clkops_null,
-       .recalc         = &followparent_recalc,
+       .fixed_div      = 8,
+       .recalc         = &omap_fixed_divisor_recalc,
 };
 
 static const struct clksel_rate div2_4to8_rates[] = {
@@ -1109,7 +1118,8 @@ static struct clk func_48mc_fclk = {
        .name           = "func_48mc_fclk",
        .parent         = &dpll_per_m2x2_ck,
        .ops            = &clkops_null,
-       .recalc         = &followparent_recalc,
+       .fixed_div      = 4,
+       .recalc         = &omap_fixed_divisor_recalc,
 };
 
 static const struct clksel_rate div2_2to4_rates[] = {
@@ -1226,7 +1236,8 @@ static struct clk lp_clk_div_ck = {
        .name           = "lp_clk_div_ck",
        .parent         = &dpll_abe_m2x2_ck,
        .ops            = &clkops_null,
-       .recalc         = &followparent_recalc,
+       .fixed_div      = 16,
+       .recalc         = &omap_fixed_divisor_recalc,
 };
 
 static const struct clksel l4_wkup_clk_mux_sel[] = {
@@ -1294,7 +1305,8 @@ static struct clk per_abe_24m_fclk = {
        .name           = "per_abe_24m_fclk",
        .parent         = &dpll_abe_m2_ck,
        .ops            = &clkops_null,
-       .recalc         = &followparent_recalc,
+       .fixed_div      = 4,
+       .recalc         = &omap_fixed_divisor_recalc,
 };
 
 static const struct clksel pmd_stm_clock_mux_sel[] = {
@@ -1828,6 +1840,7 @@ static struct clk l3_instr_ick = {
        .enable_reg     = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL,
        .enable_bit     = OMAP4430_MODULEMODE_HWCTRL,
        .clkdm_name     = "l3_instr_clkdm",
+       .flags          = ENABLE_ON_INIT,
        .parent         = &l3_div_ck,
        .recalc         = &followparent_recalc,
 };
@@ -1838,6 +1851,7 @@ static struct clk l3_main_3_ick = {
        .enable_reg     = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL,
        .enable_bit     = OMAP4430_MODULEMODE_HWCTRL,
        .clkdm_name     = "l3_instr_clkdm",
+       .flags          = ENABLE_ON_INIT,
        .parent         = &l3_div_ck,
        .recalc         = &followparent_recalc,
 };
@@ -2142,6 +2156,7 @@ static struct clk ocp_wp_noc_ick = {
        .enable_reg     = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL,
        .enable_bit     = OMAP4430_MODULEMODE_HWCTRL,
        .clkdm_name     = "l3_instr_clkdm",
+       .flags          = ENABLE_ON_INIT,
        .parent         = &l3_div_ck,
        .recalc         = &followparent_recalc,
 };
@@ -3183,6 +3198,7 @@ static struct omap_clk omap44xx_clks[] = {
        CLK(NULL,       "uart3_fck",                    &uart3_fck,     CK_443X),
        CLK(NULL,       "uart4_fck",                    &uart4_fck,     CK_443X),
        CLK(NULL,       "usb_host_fs_fck",              &usb_host_fs_fck,       CK_443X),
+       CLK("ehci-omap.0",      "fs_fck",               &usb_host_fs_fck,       CK_443X),
        CLK(NULL,       "utmi_p1_gfclk",                &utmi_p1_gfclk, CK_443X),
        CLK(NULL,       "usb_host_hs_utmi_p1_clk",      &usb_host_hs_utmi_p1_clk,       CK_443X),
        CLK(NULL,       "utmi_p2_gfclk",                &utmi_p2_gfclk, CK_443X),
@@ -3194,18 +3210,23 @@ static struct omap_clk omap44xx_clks[] = {
        CLK(NULL,       "usb_host_hs_hsic480m_p2_clk",  &usb_host_hs_hsic480m_p2_clk,   CK_443X),
        CLK(NULL,       "usb_host_hs_func48mclk",       &usb_host_hs_func48mclk,        CK_443X),
        CLK(NULL,       "usb_host_hs_fck",              &usb_host_hs_fck,       CK_443X),
+       CLK("ehci-omap.0",      "hs_fck",               &usb_host_hs_fck,       CK_443X),
+       CLK("ehci-omap.0",      "usbhost_ick",          &dummy_ck,              CK_443X),
        CLK(NULL,       "otg_60m_gfclk",                &otg_60m_gfclk, CK_443X),
        CLK(NULL,       "usb_otg_hs_xclk",              &usb_otg_hs_xclk,       CK_443X),
-       CLK("musb_hdrc",        "ick",                          &usb_otg_hs_ick,        CK_443X),
+       CLK("musb-omap2430",    "ick",                          &usb_otg_hs_ick,        CK_443X),
        CLK(NULL,       "usb_phy_cm_clk32k",            &usb_phy_cm_clk32k,     CK_443X),
        CLK(NULL,       "usb_tll_hs_usb_ch2_clk",       &usb_tll_hs_usb_ch2_clk,        CK_443X),
        CLK(NULL,       "usb_tll_hs_usb_ch0_clk",       &usb_tll_hs_usb_ch0_clk,        CK_443X),
        CLK(NULL,       "usb_tll_hs_usb_ch1_clk",       &usb_tll_hs_usb_ch1_clk,        CK_443X),
        CLK(NULL,       "usb_tll_hs_ick",               &usb_tll_hs_ick,        CK_443X),
+       CLK("ehci-omap.0",      "usbtll_ick",           &usb_tll_hs_ick,        CK_443X),
+       CLK("ehci-omap.0",      "usbtll_fck",           &dummy_ck,      CK_443X),
        CLK(NULL,       "usim_ck",                      &usim_ck,       CK_443X),
        CLK(NULL,       "usim_fclk",                    &usim_fclk,     CK_443X),
        CLK(NULL,       "usim_fck",                     &usim_fck,      CK_443X),
        CLK("omap_wdt", "fck",                          &wd_timer2_fck, CK_443X),
+       CLK(NULL,       "mailboxes_ick",                &dummy_ck,      CK_443X),
        CLK(NULL,       "wd_timer3_fck",                &wd_timer3_fck, CK_443X),
        CLK(NULL,       "stm_clk_div_ck",               &stm_clk_div_ck,        CK_443X),
        CLK(NULL,       "trace_clk_div_ck",             &trace_clk_div_ck,      CK_443X),