Merge branch 'misc-3.2' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux
[pandora-kernel.git] / arch / arm / mach-omap2 / clock3xxx_data.c
index ffd55b1..65dd363 100644 (file)
@@ -3078,6 +3078,7 @@ static struct clk gpt12_fck = {
        .name           = "gpt12_fck",
        .ops            = &clkops_null,
        .parent         = &secure_32k_fck,
+       .clkdm_name     = "wkup_clkdm",
        .recalc         = &followparent_recalc,
 };
 
@@ -3085,6 +3086,7 @@ static struct clk wdt1_fck = {
        .name           = "wdt1_fck",
        .ops            = &clkops_null,
        .parent         = &secure_32k_fck,
+       .clkdm_name     = "wkup_clkdm",
        .recalc         = &followparent_recalc,
 };
 
@@ -3462,6 +3464,42 @@ static struct omap_clk omap3xxx_clks[] = {
        CLK("musb-am35x",       "fck",          &hsotgusb_fck_am35xx,   CK_AM35XX),
        CLK(NULL,       "hecc_ck",      &hecc_ck,       CK_AM35XX),
        CLK(NULL,       "uart4_ick",    &uart4_ick_am35xx,      CK_AM35XX),
+       CLK("omap_timer.1",     "fck",  &gpt1_fck,      CK_3XXX),
+       CLK("omap_timer.2",     "fck",  &gpt2_fck,      CK_3XXX),
+       CLK("omap_timer.3",     "fck",  &gpt3_fck,      CK_3XXX),
+       CLK("omap_timer.4",     "fck",  &gpt4_fck,      CK_3XXX),
+       CLK("omap_timer.5",     "fck",  &gpt5_fck,      CK_3XXX),
+       CLK("omap_timer.6",     "fck",  &gpt6_fck,      CK_3XXX),
+       CLK("omap_timer.7",     "fck",  &gpt7_fck,      CK_3XXX),
+       CLK("omap_timer.8",     "fck",  &gpt8_fck,      CK_3XXX),
+       CLK("omap_timer.9",     "fck",  &gpt9_fck,      CK_3XXX),
+       CLK("omap_timer.10",    "fck",  &gpt10_fck,     CK_3XXX),
+       CLK("omap_timer.11",    "fck",  &gpt11_fck,     CK_3XXX),
+       CLK("omap_timer.12",    "fck",  &gpt12_fck,     CK_3XXX),
+       CLK("omap_timer.1",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.2",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.3",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.4",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.5",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.6",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.7",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.8",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.9",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.10",    "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.11",    "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.12",    "32k_ck",       &omap_32k_fck,  CK_3XXX),
+       CLK("omap_timer.1",     "sys_ck",       &sys_ck,        CK_3XXX),
+       CLK("omap_timer.2",     "sys_ck",       &sys_ck,        CK_3XXX),
+       CLK("omap_timer.3",     "sys_ck",       &sys_ck,        CK_3XXX),
+       CLK("omap_timer.4",     "sys_ck",       &sys_ck,        CK_3XXX),
+       CLK("omap_timer.5",     "sys_ck",       &sys_ck,        CK_3XXX),
+       CLK("omap_timer.6",     "sys_ck",       &sys_ck,        CK_3XXX),
+       CLK("omap_timer.7",     "sys_ck",       &sys_ck,        CK_3XXX),
+       CLK("omap_timer.8",     "sys_ck",       &sys_ck,        CK_3XXX),
+       CLK("omap_timer.9",     "sys_ck",       &sys_ck,        CK_3XXX),
+       CLK("omap_timer.10",    "sys_ck",       &sys_ck,        CK_3XXX),
+       CLK("omap_timer.11",    "sys_ck",       &sys_ck,        CK_3XXX),
+       CLK("omap_timer.12",    "sys_ck",       &sys_ck,        CK_3XXX),
 };
 
 
@@ -3470,7 +3508,16 @@ int __init omap3xxx_clk_init(void)
        struct omap_clk *c;
        u32 cpu_clkflg = 0;
 
-       if (cpu_is_omap3517()) {
+       /*
+        * 3505 must be tested before 3517, since 3517 returns true
+        * for both AM3517 chips and AM3517 family chips, which
+        * includes 3505.  Unfortunately there's no obvious family
+        * test for 3517/3505 :-(
+        */
+       if (cpu_is_omap3505()) {
+               cpu_mask = RATE_IN_34XX;
+               cpu_clkflg = CK_3505;
+       } else if (cpu_is_omap3517()) {
                cpu_mask = RATE_IN_34XX;
                cpu_clkflg = CK_3517;
        } else if (cpu_is_omap3505()) {