Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux...

[pandora-kernel.git] / arch / arm / mach-omap2 / clock2430_data.c

diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 0438b6e..2df50d9 100644 (file)
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -155,12 +155,12 @@ static struct clk apll54_ck = {
 /* func_54m_ck */
 
 static const struct clksel_rate func_54m_apll54_rates[] = {
-       { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 0, .flags = RATE_IN_24XX },
        { .div = 0 },
 };
 
 static const struct clksel_rate func_54m_alt_rates[] = {
-       { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 1, .flags = RATE_IN_24XX },
        { .div = 0 },
 };
 
@@ -177,7 +177,7 @@ static struct clk func_54m_ck = {
        .clkdm_name     = "wkup_clkdm",
        .init           = &omap2_init_clksel_parent,
        .clksel_reg     = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
-       .clksel_mask    = OMAP24XX_54M_SOURCE,
+       .clksel_mask    = OMAP24XX_54M_SOURCE_MASK,
        .clksel         = func_54m_clksel,
        .recalc         = &omap2_clksel_recalc,
 };
@@ -192,12 +192,12 @@ static struct clk core_ck = {
 
 /* func_96m_ck */
 static const struct clksel_rate func_96m_apll96_rates[] = {
-       { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 0, .flags = RATE_IN_24XX },
        { .div = 0 },
 };
 
 static const struct clksel_rate func_96m_alt_rates[] = {
-       { .div = 1, .val = 1, .flags = RATE_IN_243X | DEFAULT_RATE },
+       { .div = 1, .val = 1, .flags = RATE_IN_243X },
        { .div = 0 },
 };
 
@@ -214,7 +214,7 @@ static struct clk func_96m_ck = {
        .clkdm_name     = "wkup_clkdm",
        .init           = &omap2_init_clksel_parent,
        .clksel_reg     = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
-       .clksel_mask    = OMAP2430_96M_SOURCE,
+       .clksel_mask    = OMAP2430_96M_SOURCE_MASK,
        .clksel         = func_96m_clksel,
        .recalc         = &omap2_clksel_recalc,
 };
@@ -222,12 +222,12 @@ static struct clk func_96m_ck = {
 /* func_48m_ck */
 
 static const struct clksel_rate func_48m_apll96_rates[] = {
-       { .div = 2, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 2, .val = 0, .flags = RATE_IN_24XX },
        { .div = 0 },
 };
 
 static const struct clksel_rate func_48m_alt_rates[] = {
-       { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 1, .flags = RATE_IN_24XX },
        { .div = 0 },
 };
 
@@ -244,7 +244,7 @@ static struct clk func_48m_ck = {
        .clkdm_name     = "wkup_clkdm",
        .init           = &omap2_init_clksel_parent,
        .clksel_reg     = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
-       .clksel_mask    = OMAP24XX_48M_SOURCE,
+       .clksel_mask    = OMAP24XX_48M_SOURCE_MASK,
        .clksel         = func_48m_clksel,
        .recalc         = &omap2_clksel_recalc,
        .round_rate     = &omap2_clksel_round_rate,
@@ -277,22 +277,22 @@ static struct clk wdt1_osc_ck = {
  * flags fields, which mark them as 2420-only.
  */
 static const struct clksel_rate common_clkout_src_core_rates[] = {
-       { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 0, .flags = RATE_IN_24XX },
        { .div = 0 }
 };
 
 static const struct clksel_rate common_clkout_src_sys_rates[] = {
-       { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 1, .flags = RATE_IN_24XX },
        { .div = 0 }
 };
 
 static const struct clksel_rate common_clkout_src_96m_rates[] = {
-       { .div = 1, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 2, .flags = RATE_IN_24XX },
        { .div = 0 }
 };
 
 static const struct clksel_rate common_clkout_src_54m_rates[] = {
-       { .div = 1, .val = 3, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 3, .flags = RATE_IN_24XX },
        { .div = 0 }
 };
 
@@ -321,7 +321,7 @@ static struct clk sys_clkout_src = {
 };
 
 static const struct clksel_rate common_clkout_rates[] = {
-       { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 0, .flags = RATE_IN_24XX },
        { .div = 2, .val = 1, .flags = RATE_IN_24XX },
        { .div = 4, .val = 2, .flags = RATE_IN_24XX },
        { .div = 8, .val = 3, .flags = RATE_IN_24XX },
@@ -369,7 +369,7 @@ static struct clk emul_ck = {
  *
  */
 static const struct clksel_rate mpu_core_rates[] = {
-       { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 1, .flags = RATE_IN_24XX },
        { .div = 2, .val = 2, .flags = RATE_IN_24XX },
        { .div = 0 },
 };
@@ -402,7 +402,7 @@ static struct clk mpu_ck = {        /* Control cpu */
  * routed into a synchronizer and out of clocks abc.
  */
 static const struct clksel_rate dsp_fck_core_rates[] = {
-       { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 1, .flags = RATE_IN_24XX },
        { .div = 2, .val = 2, .flags = RATE_IN_24XX },
        { .div = 3, .val = 3, .flags = RATE_IN_24XX },
        { .div = 4, .val = 4, .flags = RATE_IN_24XX },
@@ -429,7 +429,7 @@ static struct clk dsp_fck = {
 
 /* DSP interface clock */
 static const struct clksel_rate dsp_irate_ick_rates[] = {
-       { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 1, .flags = RATE_IN_24XX },
        { .div = 2, .val = 2, .flags = RATE_IN_24XX },
        { .div = 3, .val = 3, .flags = RATE_IN_243X },
        { .div = 0 },
@@ -481,7 +481,7 @@ static struct clk iva2_1_ick = {
  */
 static const struct clksel_rate core_l3_core_rates[] = {
        { .div = 1, .val = 1, .flags = RATE_IN_24XX },
-       { .div = 4, .val = 4, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 4, .val = 4, .flags = RATE_IN_24XX },
        { .div = 6, .val = 6, .flags = RATE_IN_24XX },
        { .div = 0 }
 };
@@ -505,7 +505,7 @@ static struct clk core_l3_ck = {    /* Used for ick and fck, interconnect */
 /* usb_l4_ick */
 static const struct clksel_rate usb_l4_ick_core_l3_rates[] = {
        { .div = 1, .val = 1, .flags = RATE_IN_24XX },
-       { .div = 2, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 2, .val = 2, .flags = RATE_IN_24XX },
        { .div = 4, .val = 4, .flags = RATE_IN_24XX },
        { .div = 0 }
 };
@@ -537,7 +537,7 @@ static struct clk usb_l4_ick = {    /* FS-USB interface clock */
  * this domain.
  */
 static const struct clksel_rate l4_core_l3_rates[] = {
-       { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 1, .flags = RATE_IN_24XX },
        { .div = 2, .val = 2, .flags = RATE_IN_24XX },
        { .div = 0 }
 };
@@ -568,7 +568,7 @@ static struct clk l4_ck = {         /* used both as an ick and fck */
  */
 static const struct clksel_rate ssi_ssr_sst_fck_core_rates[] = {
        { .div = 1, .val = 1, .flags = RATE_IN_24XX },
-       { .div = 2, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 2, .val = 2, .flags = RATE_IN_24XX },
        { .div = 3, .val = 3, .flags = RATE_IN_24XX },
        { .div = 4, .val = 4, .flags = RATE_IN_24XX },
        { .div = 5, .val = 5, .flags = RATE_IN_243X },
@@ -673,7 +673,7 @@ static struct clk gfx_ick = {
  */
 static const struct clksel_rate mdm_ick_core_rates[] = {
        { .div = 1, .val = 1, .flags = RATE_IN_243X },
-       { .div = 4, .val = 4, .flags = RATE_IN_243X | DEFAULT_RATE },
+       { .div = 4, .val = 4, .flags = RATE_IN_243X },
        { .div = 6, .val = 6, .flags = RATE_IN_243X },
        { .div = 9, .val = 9, .flags = RATE_IN_243X },
        { .div = 0 }
@@ -718,7 +718,7 @@ static struct clk mdm_osc_ck = {
 /* XXX Add RATE_NOT_VALIDATED */
 
 static const struct clksel_rate dss1_fck_sys_rates[] = {
-       { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 0, .flags = RATE_IN_24XX },
        { .div = 0 }
 };
 
@@ -732,7 +732,7 @@ static const struct clksel_rate dss1_fck_core_rates[] = {
        { .div = 8, .val = 8, .flags = RATE_IN_24XX },
        { .div = 9, .val = 9, .flags = RATE_IN_24XX },
        { .div = 12, .val = 12, .flags = RATE_IN_24XX },
-       { .div = 16, .val = 16, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 16, .val = 16, .flags = RATE_IN_24XX },
        { .div = 0 }
 };
 
@@ -767,12 +767,12 @@ static struct clk dss1_fck = {
 };
 
 static const struct clksel_rate dss2_fck_sys_rates[] = {
-       { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 0, .flags = RATE_IN_24XX },
        { .div = 0 }
 };
 
 static const struct clksel_rate dss2_fck_48m_rates[] = {
-       { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 1, .flags = RATE_IN_24XX },
        { .div = 0 }
 };
 
@@ -813,7 +813,7 @@ static struct clk dss_54m_fck = {   /* Alt clk used in power management */
  * functional clock parents.
  */
 static const struct clksel_rate gpt_alt_rates[] = {
-       { .div = 1, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE },
+       { .div = 1, .val = 2, .flags = RATE_IN_24XX },
        { .div = 0 }
 };