Pull bugzilla-5452 into release branch

[pandora-kernel.git] / arch / arm / mach-omap2 / clock.h

diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 4aeab55..6c78d47 100644 (file)
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -24,7 +24,7 @@ static void omap2_propagate_rate(struct clk * clk);
 static void omap2_mpu_recalc(struct clk * clk);
 static int omap2_select_table_rate(struct clk * clk, unsigned long rate);
 static long omap2_round_to_table_rate(struct clk * clk, unsigned long rate);
-static void omap2_clk_unuse(struct clk *clk);
+static void omap2_clk_disable(struct clk *clk);
 static void omap2_sys_clk_recalc(struct clk * clk);
 static u32 omap2_clksel_to_divisor(u32 div_sel, u32 field_val);
 static u32 omap2_clksel_get_divisor(struct clk *clk);
@@ -33,20 +33,6 @@ static u32 omap2_clksel_get_divisor(struct clk *clk);
 #define RATE_IN_242X   (1 << 0)
 #define RATE_IN_243X   (1 << 1)
 
-/* Memory timings */
-#define M_DDR          1
-#define M_LOCK_CTRL    (1 << 2)
-#define M_UNLOCK       0
-#define M_LOCK         1
-
-struct memory_timings {
-       u32 m_type;             /* ddr = 1, sdr = 0 */
-       u32 dll_mode;           /* use lock mode = 1, unlock mode = 0 */
-       u32 slow_dll_ctrl;      /* unlock mode, dll value for slow speed */
-       u32 fast_dll_ctrl;      /* unlock mode, dll value for fast speed */
-       u32 base_cs;            /* base chip select to use for calculations */
-};
-
 /* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
  * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,CM_CLKSEL_DSP
  * CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL CM_CLKSEL2_PLL, CM_CLKSEL_MDM
@@ -731,6 +717,16 @@ static struct clk sys_clkout2 = {
        .recalc         = &omap2_clksel_recalc,
 };
 
+static struct clk emul_ck = {
+       .name           = "emul_ck",
+       .parent         = &func_54m_ck,
+       .flags          = CLOCK_IN_OMAP242X,
+       .enable_reg     = (void __iomem *)&PRCM_CLKEMUL_CTRL,
+       .enable_bit     = 0,
+       .recalc         = &omap2_propagate_rate,
+
+};
+
 /*
  * MPU clock domain
  *     Clocks:
@@ -859,7 +855,7 @@ static struct clk core_l3_ck = {    /* Used for ick and fck, interconnect */
 
 static struct clk usb_l4_ick = {       /* FS-USB interface clock */
        .name           = "usb_l4_ick",
-       .parent         = &core_ck,
+       .parent         = &core_l3_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                RATE_CKCTL | CM_CORE_SEL1 | DELAYED_APP |
                                CONFIG_PARTICIPANT,
@@ -1045,7 +1041,7 @@ static struct clk gpt1_ick = {
        .name           = "gpt1_ick",
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .enable_reg     = (void __iomem *)&CM_ICLKEN_WKUP,      /* Bit4 */
+       .enable_reg     = (void __iomem *)&CM_ICLKEN_WKUP,      /* Bit0 */
        .enable_bit     = 0,
        .recalc         = &omap2_followparent_recalc,
 };
@@ -1055,7 +1051,7 @@ static struct clk gpt1_fck = {
        .parent         = &func_32k_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
                                CM_WKUP_SEL1,
-       .enable_reg     = (void __iomem *)&CM_FCLKEN_WKUP,
+       .enable_reg     = (void __iomem *)&CM_FCLKEN_WKUP,      /* Bit0 */
        .enable_bit     = 0,
        .src_offset     = 0,
        .recalc         = &omap2_followparent_recalc,
@@ -1065,7 +1061,7 @@ static struct clk gpt2_ick = {
        .name           = "gpt2_ick",
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
-       .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,     /* bit4 */
+       .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,     /* Bit4 */
        .enable_bit     = 0,
        .recalc         = &omap2_followparent_recalc,
 };
@@ -1702,7 +1698,8 @@ static struct clk hdq_fck = {
 };
 
 static struct clk i2c2_ick = {
-       .name           = "i2c2_ick",
+       .name           = "i2c_ick",
+       .id             = 2,
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
@@ -1711,7 +1708,8 @@ static struct clk i2c2_ick = {
 };
 
 static struct clk i2c2_fck = {
-       .name           = "i2c2_fck",
+       .name           = "i2c_fck",
+       .id             = 2,
        .parent         = &func_12m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
@@ -1729,7 +1727,8 @@ static struct clk i2chs2_fck = {
 };
 
 static struct clk i2c1_ick = {
-       .name           = "i2c1_ick",
+       .name           = "i2c_ick",
+       .id             = 1,
        .parent         = &l4_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .enable_reg     = (void __iomem *)&CM_ICLKEN1_CORE,
@@ -1738,7 +1737,8 @@ static struct clk i2c1_ick = {
 };
 
 static struct clk i2c1_fck = {
-       .name           = "i2c1_fck",
+       .name           = "i2c_fck",
+       .id             = 1,
        .parent         = &func_12m_ck,
        .flags          = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
        .enable_reg     = (void __iomem *)&CM_FCLKEN1_CORE,
@@ -1839,7 +1839,7 @@ static struct clk usb_fck = {
 
 static struct clk usbhs_ick = {
        .name           = "usbhs_ick",
-       .parent         = &l4_ck,
+       .parent         = &core_l3_ck,
        .flags          = CLOCK_IN_OMAP243X,
        .enable_reg     = (void __iomem *)&CM_ICLKEN2_CORE,
        .enable_bit     = 6,
@@ -1971,6 +1971,7 @@ static struct clk *onchip_clks[] = {
        &wdt1_osc_ck,
        &sys_clkout,
        &sys_clkout2,
+       &emul_ck,
        /* mpu domain clocks */
        &mpu_ck,
        /* dsp domain clocks */