Merge git://git.infradead.org/battery-2.6

[pandora-kernel.git] / arch / arm / mach-omap2 / clock.c

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 4247a15..b0665f1 100644 (file)
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -91,9 +91,9 @@ static void _omap2xxx_clk_commit(struct clk *clk)
                return;
 
        prm_write_mod_reg(OMAP24XX_VALID_CONFIG, OMAP24XX_GR_MOD,
-               OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET);
+               OMAP2_PRCM_CLKCFG_CTRL_OFFSET);
        /* OCP barrier */
-       prm_read_mod_reg(OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET);
+       prm_read_mod_reg(OMAP24XX_GR_MOD, OMAP2_PRCM_CLKCFG_CTRL_OFFSET);
 }
 
 /*
@@ -302,7 +302,7 @@ int omap2_wait_clock_ready(void __iomem *reg, u32 mask, const char *name)
                udelay(1);
        }
 
-       if (i < MAX_CLOCK_ENABLE_WAIT)
+       if (i <= MAX_CLOCK_ENABLE_WAIT)
                pr_debug("Clock %s stable after %d loops\n", name, i);
        else
                printk(KERN_ERR "Clock %s didn't enable in %d tries\n",
@@ -547,8 +547,8 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
        const struct clksel_rate *clkr;
        u32 last_div = 0;
 
-       printk(KERN_INFO "clock: clksel_round_rate_div: %s target_rate %ld\n",
-              clk->name, target_rate);
+       pr_debug("clock: clksel_round_rate_div: %s target_rate %ld\n",
+                clk->name, target_rate);
 
        *new_div = 1;
 
@@ -562,7 +562,7 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
 
                /* Sanity check */
                if (clkr->div <= last_div)
-                       printk(KERN_ERR "clock: clksel_rate table not sorted "
+                       pr_err("clock: clksel_rate table not sorted "
                               "for clock %s", clk->name);
 
                last_div = clkr->div;
@@ -574,7 +574,7 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
        }
 
        if (!clkr->div) {
-               printk(KERN_ERR "clock: Could not find divisor for target "
+               pr_err("clock: Could not find divisor for target "
                       "rate %ld for clock %s parent %s\n", target_rate,
                       clk->name, clk->parent->name);
                return ~0;
@@ -582,8 +582,8 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
 
        *new_div = clkr->div;
 
-       printk(KERN_INFO "clock: new_div = %d, new_rate = %ld\n", *new_div,
-              (clk->parent->rate / clkr->div));
+       pr_debug("clock: new_div = %d, new_rate = %ld\n", *new_div,
+                (clk->parent->rate / clkr->div));
 
        return (clk->parent->rate / clkr->div);
 }
@@ -1035,7 +1035,7 @@ void omap2_clk_disable_unused(struct clk *clk)
        if ((regval32 & (1 << clk->enable_bit)) == v)
                return;
 
-       printk(KERN_INFO "Disabling unused clock \"%s\"\n", clk->name);
+       printk(KERN_DEBUG "Disabling unused clock \"%s\"\n", clk->name);
        if (cpu_is_omap34xx()) {
                omap2_clk_enable(clk);
                omap2_clk_disable(clk);