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Merge current mainline tree into linux-omap tree
[pandora-kernel.git] / arch / arm / mach-omap1 / clock.h
diff --git a/arch/arm/mach-omap1/clock.h b/arch/arm/mach-omap1/clock.h
index f7df002..44eda0f 100644 (file)
--- a/arch/arm/mach-omap1/clock.h
+++ b/arch/arm/mach-omap1/clock.h
@@ -17,6 +17,8 @@ static int omap1_clk_enable_generic(struct clk * clk);
 static void omap1_clk_disable_generic(struct clk * clk);
 static void omap1_ckctl_recalc(struct clk * clk);
 static void omap1_watchdog_recalc(struct clk * clk);
+static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate);
+static void omap1_sossi_recalc(struct clk *clk);
 static void omap1_ckctl_recalc_dsp_domain(struct clk * clk);
 static int omap1_clk_enable_dsp_domain(struct clk * clk);
 static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate);
@@ -168,10 +170,11 @@ static struct clk ck_dpll1 = {
 
 static struct arm_idlect1_clk ck_dpll1out = {
        .clk = {
-               .name           = "ck_dpll1out",
+               .name           = "ck_dpll1out",
                .parent         = &ck_dpll1,
-               .flags          = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL,
-               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .flags          = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL |
+                                 ENABLE_REG_32BIT | RATE_PROPAGATES,
+               .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
                .enable_bit     = EN_CKOUT_ARM,
                .recalc         = &followparent_recalc,
                .enable         = &omap1_clk_enable_generic,
@@ -180,6 +183,19 @@ static struct arm_idlect1_clk ck_dpll1out = {
        .idlect_shift   = 12,
 };
 
+static struct clk sossi_ck = {
+       .name           = "ck_sossi",
+       .parent         = &ck_dpll1out.clk,
+       .flags          = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT |
+                         ENABLE_REG_32BIT,
+       .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1),
+       .enable_bit     = 16,
+       .recalc         = &omap1_sossi_recalc,
+       .set_rate       = &omap1_set_sossi_rate,
+       .enable         = &omap1_clk_enable_generic,
+       .disable        = &omap1_clk_disable_generic,
+};
+
 static struct clk arm_ck = {
        .name           = "arm_ck",
        .parent         = &ck_dpll1,
@@ -199,7 +215,7 @@ static struct arm_idlect1_clk armper_ck = {
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                                  CLOCK_IN_OMAP310 | RATE_CKCTL |
                                  CLOCK_IDLE_CONTROL,
-               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
                .enable_bit     = EN_PERCK,
                .rate_offset    = CKCTL_PERDIV_OFFSET,
                .recalc         = &omap1_ckctl_recalc,
@@ -213,7 +229,7 @@ static struct clk arm_gpio_ck = {
        .name           = "arm_gpio_ck",
        .parent         = &ck_dpll1,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
-       .enable_reg     = (void __iomem *)ARM_IDLECT2,
+       .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
        .enable_bit     = EN_GPIOCK,
        .recalc         = &followparent_recalc,
        .enable         = &omap1_clk_enable_generic,
@@ -226,7 +242,7 @@ static struct arm_idlect1_clk armxor_ck = {
                .parent         = &ck_ref,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                                  CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
-               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
                .enable_bit     = EN_XORPCK,
                .recalc         = &followparent_recalc,
                .enable         = &omap1_clk_enable_generic,
@@ -241,7 +257,7 @@ static struct arm_idlect1_clk armtim_ck = {
                .parent         = &ck_ref,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                                  CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
-               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
                .enable_bit     = EN_TIMCK,
                .recalc         = &followparent_recalc,
                .enable         = &omap1_clk_enable_generic,
@@ -256,7 +272,7 @@ static struct arm_idlect1_clk armwdt_ck = {
                .parent         = &ck_ref,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                                  CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
-               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
                .enable_bit     = EN_WDTCK,
                .recalc         = &omap1_watchdog_recalc,
                .enable         = &omap1_clk_enable_generic,
@@ -282,9 +298,9 @@ static struct clk arminth_ck16xx = {
 static struct clk dsp_ck = {
        .name           = "dsp_ck",
        .parent         = &ck_dpll1,
-       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+       .flags          = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                          RATE_CKCTL,
-       .enable_reg     = (void __iomem *)ARM_CKCTL,
+       .enable_reg     = OMAP1_IO_ADDRESS(ARM_CKCTL),
        .enable_bit     = EN_DSPCK,
        .rate_offset    = CKCTL_DSPDIV_OFFSET,
        .recalc         = &omap1_ckctl_recalc,
@@ -295,7 +311,7 @@ static struct clk dsp_ck = {
 static struct clk dspmmu_ck = {
        .name           = "dspmmu_ck",
        .parent         = &ck_dpll1,
-       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+       .flags          = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                          RATE_CKCTL | ALWAYS_ENABLED,
        .rate_offset    = CKCTL_DSPMMUDIV_OFFSET,
        .recalc         = &omap1_ckctl_recalc,
@@ -306,9 +322,9 @@ static struct clk dspmmu_ck = {
 static struct clk dspper_ck = {
        .name           = "dspper_ck",
        .parent         = &ck_dpll1,
-       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         RATE_CKCTL | VIRTUAL_IO_ADDRESS,
-       .enable_reg     = (void __iomem *)DSP_IDLECT2,
+       .flags          = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+                         RATE_CKCTL,
+       .enable_reg     = IOMEM(DSP_IDLECT2),
        .enable_bit     = EN_PERCK,
        .rate_offset    = CKCTL_PERDIV_OFFSET,
        .recalc         = &omap1_ckctl_recalc_dsp_domain,
@@ -320,9 +336,8 @@ static struct clk dspper_ck = {
 static struct clk dspxor_ck = {
        .name           = "dspxor_ck",
        .parent         = &ck_ref,
-       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         VIRTUAL_IO_ADDRESS,
-       .enable_reg     = (void __iomem *)DSP_IDLECT2,
+       .flags          = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
+       .enable_reg     = IOMEM(DSP_IDLECT2),
        .enable_bit     = EN_XORPCK,
        .recalc         = &followparent_recalc,
        .enable         = &omap1_clk_enable_dsp_domain,
@@ -332,9 +347,8 @@ static struct clk dspxor_ck = {
 static struct clk dsptim_ck = {
        .name           = "dsptim_ck",
        .parent         = &ck_ref,
-       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
-                         VIRTUAL_IO_ADDRESS,
-       .enable_reg     = (void __iomem *)DSP_IDLECT2,
+       .flags          = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
+       .enable_reg     = IOMEM(DSP_IDLECT2),
        .enable_bit     = EN_DSPTIMCK,
        .recalc         = &followparent_recalc,
        .enable         = &omap1_clk_enable_dsp_domain,
@@ -374,7 +388,7 @@ static struct clk arminth_ck1510 = {
 
 static struct clk tipb_ck = {
        /* No-idle controlled by "tc_ck" */
-       .name           = "tibp_ck",
+       .name           = "tipb_ck",
        .parent         = &tc_ck.clk,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
                          ALWAYS_ENABLED,
@@ -388,7 +402,7 @@ static struct clk l3_ocpi_ck = {
        .name           = "l3_ocpi_ck",
        .parent         = &tc_ck.clk,
        .flags          = CLOCK_IN_OMAP16XX,
-       .enable_reg     = (void __iomem *)ARM_IDLECT3,
+       .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT3),
        .enable_bit     = EN_OCPI_CK,
        .recalc         = &followparent_recalc,
        .enable         = &omap1_clk_enable_generic,
@@ -399,7 +413,7 @@ static struct clk tc1_ck = {
        .name           = "tc1_ck",
        .parent         = &tc_ck.clk,
        .flags          = CLOCK_IN_OMAP16XX,
-       .enable_reg     = (void __iomem *)ARM_IDLECT3,
+       .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT3),
        .enable_bit     = EN_TC1_CK,
        .recalc         = &followparent_recalc,
        .enable         = &omap1_clk_enable_generic,
@@ -410,7 +424,7 @@ static struct clk tc2_ck = {
        .name           = "tc2_ck",
        .parent         = &tc_ck.clk,
        .flags          = CLOCK_IN_OMAP16XX,
-       .enable_reg     = (void __iomem *)ARM_IDLECT3,
+       .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT3),
        .enable_bit     = EN_TC2_CK,
        .recalc         = &followparent_recalc,
        .enable         = &omap1_clk_enable_generic,
@@ -443,7 +457,7 @@ static struct arm_idlect1_clk api_ck = {
                .parent         = &tc_ck.clk,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                                  CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL,
-               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
                .enable_bit     = EN_APICK,
                .recalc         = &followparent_recalc,
                .enable         = &omap1_clk_enable_generic,
@@ -458,7 +472,7 @@ static struct arm_idlect1_clk lb_ck = {
                .parent         = &tc_ck.clk,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
                                  CLOCK_IDLE_CONTROL,
-               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
                .enable_bit     = EN_LBCK,
                .recalc         = &followparent_recalc,
                .enable         = &omap1_clk_enable_generic,
@@ -489,7 +503,7 @@ static struct clk lcd_ck_16xx = {
        .name           = "lcd_ck",
        .parent         = &ck_dpll1,
        .flags          = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730 | RATE_CKCTL,
-       .enable_reg     = (void __iomem *)ARM_IDLECT2,
+       .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
        .enable_bit     = EN_LCDCK,
        .rate_offset    = CKCTL_LCDDIV_OFFSET,
        .recalc         = &omap1_ckctl_recalc,
@@ -503,7 +517,7 @@ static struct arm_idlect1_clk lcd_ck_1510 = {
                .parent         = &ck_dpll1,
                .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
                                  RATE_CKCTL | CLOCK_IDLE_CONTROL,
-               .enable_reg     = (void __iomem *)ARM_IDLECT2,
+               .enable_reg     = OMAP1_IO_ADDRESS(ARM_IDLECT2),
                .enable_bit     = EN_LCDCK,
                .rate_offset    = CKCTL_LCDDIV_OFFSET,
                .recalc         = &omap1_ckctl_recalc,
@@ -521,7 +535,7 @@ static struct clk uart1_1510 = {
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
                          ENABLE_REG_32BIT | ALWAYS_ENABLED |
                          CLOCK_NO_IDLE_PARENT,
-       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
        .enable_bit     = 29,   /* Chooses between 12MHz and 48MHz */
        .set_rate       = &omap1_set_uart_rate,
        .recalc         = &omap1_uart_recalc,
@@ -537,7 +551,7 @@ static struct uart_clk uart1_16xx = {
                .rate           = 48000000,
                .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED |
                                  ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
-               .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+               .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
                .enable_bit     = 29,
                .enable         = &omap1_clk_enable_uart_functional,
                .disable        = &omap1_clk_disable_uart_functional,
@@ -553,7 +567,7 @@ static struct clk uart2_ck = {
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                          CLOCK_IN_OMAP310 | ENABLE_REG_32BIT |
                          ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT,
-       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
        .enable_bit     = 30,   /* Chooses between 12MHz and 48MHz */
        .set_rate       = &omap1_set_uart_rate,
        .recalc         = &omap1_uart_recalc,
@@ -569,7 +583,7 @@ static struct clk uart3_1510 = {
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
                          ENABLE_REG_32BIT | ALWAYS_ENABLED |
                          CLOCK_NO_IDLE_PARENT,
-       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
        .enable_bit     = 31,   /* Chooses between 12MHz and 48MHz */
        .set_rate       = &omap1_set_uart_rate,
        .recalc         = &omap1_uart_recalc,
@@ -585,7 +599,7 @@ static struct uart_clk uart3_16xx = {
                .rate           = 48000000,
                .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED |
                                  ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
-               .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+               .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
                .enable_bit     = 31,
                .enable         = &omap1_clk_enable_uart_functional,
                .disable        = &omap1_clk_disable_uart_functional,
@@ -599,7 +613,7 @@ static struct clk usb_clko = {      /* 6 MHz output on W4_USB_CLKO */
        .rate           = 6000000,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                          CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT,
-       .enable_reg     = (void __iomem *)ULPD_CLOCK_CTRL,
+       .enable_reg     = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL),
        .enable_bit     = USB_MCLK_EN_BIT,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
@@ -611,7 +625,7 @@ static struct clk usb_hhc_ck1510 = {
        .rate           = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 |
                          RATE_FIXED | ENABLE_REG_32BIT,
-       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
        .enable_bit     = USB_HOST_HHC_UHOST_EN,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
@@ -624,7 +638,7 @@ static struct clk usb_hhc_ck16xx = {
        /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
        .flags          = CLOCK_IN_OMAP16XX |
                          RATE_FIXED | ENABLE_REG_32BIT,
-       .enable_reg     = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */,
+       .enable_reg     = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */
        .enable_bit     = 8 /* UHOST_EN */,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
@@ -635,7 +649,7 @@ static struct clk usb_dc_ck = {
        /* Direct from ULPD, no parent */
        .rate           = 48000000,
        .flags          = CLOCK_IN_OMAP16XX | RATE_FIXED,
-       .enable_reg     = (void __iomem *)SOFT_REQ_REG,
+       .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
        .enable_bit     = 4,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
@@ -646,7 +660,7 @@ static struct clk mclk_1510 = {
        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
        .rate           = 12000000,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED,
-       .enable_reg     = (void __iomem *)SOFT_REQ_REG,
+       .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
        .enable_bit     = 6,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
@@ -656,7 +670,7 @@ static struct clk mclk_16xx = {
        .name           = "mclk",
        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
        .flags          = CLOCK_IN_OMAP16XX,
-       .enable_reg     = (void __iomem *)COM_CLK_DIV_CTRL_SEL,
+       .enable_reg     = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL),
        .enable_bit     = COM_ULPD_PLL_CLK_REQ,
        .set_rate       = &omap1_set_ext_clk_rate,
        .round_rate     = &omap1_round_ext_clk_rate,
@@ -678,7 +692,7 @@ static struct clk bclk_16xx = {
        .name           = "bclk",
        /* Direct from ULPD, no parent. May be enabled by ext hardware. */
        .flags          = CLOCK_IN_OMAP16XX,
-       .enable_reg     = (void __iomem *)SWD_CLK_DIV_CTRL_SEL,
+       .enable_reg     = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL),
        .enable_bit     = SWD_ULPD_PLL_CLK_REQ,
        .set_rate       = &omap1_set_ext_clk_rate,
        .round_rate     = &omap1_round_ext_clk_rate,
@@ -689,14 +703,13 @@ static struct clk bclk_16xx = {
 
 static struct clk mmc1_ck = {
        .name           = "mmc_ck",
-       .id             = 1,
        /* Functional clock is direct from ULPD, interface clock is ARMPER */
        .parent         = &armper_ck.clk,
        .rate           = 48000000,
        .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                          CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT |
                          CLOCK_NO_IDLE_PARENT,
-       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
        .enable_bit     = 23,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
@@ -704,13 +717,13 @@ static struct clk mmc1_ck = {
 
 static struct clk mmc2_ck = {
        .name           = "mmc_ck",
-       .id             = 2,
+       .id             = 1,
        /* Functional clock is direct from ULPD, interface clock is ARMPER */
        .parent         = &armper_ck.clk,
        .rate           = 48000000,
        .flags          = CLOCK_IN_OMAP16XX |
                          RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
-       .enable_reg     = (void __iomem *)MOD_CONF_CTRL_0,
+       .enable_reg     = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0),
        .enable_bit     = 20,
        .enable         = &omap1_clk_enable_generic,
        .disable        = &omap1_clk_disable_generic,
@@ -733,7 +746,7 @@ remains active during MPU idle whenever this is enabled */
 static struct clk i2c_fck = {
        .name           = "i2c_fck",
        .id             = 1,
-       .flags          = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
+       .flags          = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                          VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT |
                          ALWAYS_ENABLED,
        .parent         = &armxor_ck.clk,
@@ -760,6 +773,7 @@ static struct clk * onchip_clks[] = {
        &ck_dpll1,
        /* CK_GEN1 clocks */
        &ck_dpll1out.clk,
+       &sossi_ck,
        &arm_ck,
        &armper_ck.clk,
        &arm_gpio_ck,
Pandora Kernel Repository