Merge branch 'intelfb-patches' of master.kernel.org:/pub/scm/linux/kernel/git/airlied...
[pandora-kernel.git] / arch / arm / mach-omap1 / board-h3.c
index d9f3862..f225a08 100644 (file)
  * published by the Free Software Foundation.
  */
 
-#include <linux/config.h>
 #include <linux/types.h>
 #include <linux/init.h>
 #include <linux/major.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/errno.h>
+#include <linux/workqueue.h>
 #include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
+#include <linux/input.h>
 
 #include <asm/setup.h>
 #include <asm/page.h>
 #include <asm/mach/map.h>
 
 #include <asm/arch/gpio.h>
+#include <asm/arch/gpioexpander.h>
 #include <asm/arch/irqs.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/tc.h>
+#include <asm/arch/irda.h>
 #include <asm/arch/usb.h>
+#include <asm/arch/keypad.h>
+#include <asm/arch/dma.h>
 #include <asm/arch/common.h>
 
 extern int omap_gpio_init(void);
 
-static struct mtd_partition h3_partitions[] = {
+static int h3_keymap[] = {
+       KEY(0, 0, KEY_LEFT),
+       KEY(0, 1, KEY_RIGHT),
+       KEY(0, 2, KEY_3),
+       KEY(0, 3, KEY_F10),
+       KEY(0, 4, KEY_F5),
+       KEY(0, 5, KEY_9),
+       KEY(1, 0, KEY_DOWN),
+       KEY(1, 1, KEY_UP),
+       KEY(1, 2, KEY_2),
+       KEY(1, 3, KEY_F9),
+       KEY(1, 4, KEY_F7),
+       KEY(1, 5, KEY_0),
+       KEY(2, 0, KEY_ENTER),
+       KEY(2, 1, KEY_6),
+       KEY(2, 2, KEY_1),
+       KEY(2, 3, KEY_F2),
+       KEY(2, 4, KEY_F6),
+       KEY(2, 5, KEY_HOME),
+       KEY(3, 0, KEY_8),
+       KEY(3, 1, KEY_5),
+       KEY(3, 2, KEY_F12),
+       KEY(3, 3, KEY_F3),
+       KEY(3, 4, KEY_F8),
+       KEY(3, 5, KEY_END),
+       KEY(4, 0, KEY_7),
+       KEY(4, 1, KEY_4),
+       KEY(4, 2, KEY_F11),
+       KEY(4, 3, KEY_F1),
+       KEY(4, 4, KEY_F4),
+       KEY(4, 5, KEY_ESC),
+       KEY(5, 0, KEY_F13),
+       KEY(5, 1, KEY_F14),
+       KEY(5, 2, KEY_F15),
+       KEY(5, 3, KEY_F16),
+       KEY(5, 4, KEY_SLEEP),
+       0
+};
+
+
+static struct mtd_partition nor_partitions[] = {
        /* bootloader (U-Boot, etc) in first sector */
        {
              .name             = "bootloader",
@@ -72,26 +118,80 @@ static struct mtd_partition h3_partitions[] = {
        }
 };
 
-static struct flash_platform_data h3_flash_data = {
+static struct flash_platform_data nor_data = {
        .map_name       = "cfi_probe",
        .width          = 2,
-       .parts          = h3_partitions,
-       .nr_parts       = ARRAY_SIZE(h3_partitions),
+       .parts          = nor_partitions,
+       .nr_parts       = ARRAY_SIZE(nor_partitions),
 };
 
-static struct resource h3_flash_resource = {
+static struct resource nor_resource = {
        /* This is on CS3, wherever it's mapped */
        .flags          = IORESOURCE_MEM,
 };
 
-static struct platform_device flash_device = {
+static struct platform_device nor_device = {
        .name           = "omapflash",
        .id             = 0,
        .dev            = {
-               .platform_data  = &h3_flash_data,
+               .platform_data  = &nor_data,
+       },
+       .num_resources  = 1,
+       .resource       = &nor_resource,
+};
+
+static struct mtd_partition nand_partitions[] = {
+#if 0
+       /* REVISIT: enable these partitions if you make NAND BOOT work */
+       {
+               .name           = "xloader",
+               .offset         = 0,
+               .size           = 64 * 1024,
+               .mask_flags     = MTD_WRITEABLE,        /* force read-only */
+       },
+       {
+               .name           = "bootloader",
+               .offset         = MTDPART_OFS_APPEND,
+               .size           = 256 * 1024,
+               .mask_flags     = MTD_WRITEABLE,        /* force read-only */
+       },
+       {
+               .name           = "params",
+               .offset         = MTDPART_OFS_APPEND,
+               .size           = 192 * 1024,
+       },
+       {
+               .name           = "kernel",
+               .offset         = MTDPART_OFS_APPEND,
+               .size           = 2 * SZ_1M,
+       },
+#endif
+       {
+               .name           = "filesystem",
+               .size           = MTDPART_SIZ_FULL,
+               .offset         = MTDPART_OFS_APPEND,
+       },
+};
+
+/* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
+static struct nand_platform_data nand_data = {
+       .options        = NAND_SAMSUNG_LP_OPTIONS,
+       .parts          = nand_partitions,
+       .nr_parts       = ARRAY_SIZE(nand_partitions),
+};
+
+static struct resource nand_resource = {
+       .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device nand_device = {
+       .name           = "omapnand",
+       .id             = 0,
+       .dev            = {
+               .platform_data  = &nand_data,
        },
        .num_resources  = 1,
-       .resource       = &h3_flash_resource,
+       .resource       = &nand_resource,
 };
 
 static struct resource smc91x_resources[] = {
@@ -138,10 +238,139 @@ static struct platform_device intlat_device = {
        .resource       = intlat_resources,
 };
 
+static struct resource h3_kp_resources[] = {
+       [0] = {
+               .start  = INT_KEYBOARD,
+               .end    = INT_KEYBOARD,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct omap_kp_platform_data h3_kp_data = {
+       .rows           = 8,
+       .cols           = 8,
+       .keymap         = h3_keymap,
+       .keymapsize     = ARRAY_SIZE(h3_keymap),
+       .rep            = 1,
+       .delay          = 9,
+       .dbounce        = 1,
+};
+
+static struct platform_device h3_kp_device = {
+       .name           = "omap-keypad",
+       .id             = -1,
+       .dev            = {
+               .platform_data = &h3_kp_data,
+       },
+       .num_resources  = ARRAY_SIZE(h3_kp_resources),
+       .resource       = h3_kp_resources,
+};
+
+
+/* Select between the IrDA and aGPS module
+ */
+static int h3_select_irda(struct device *dev, int state)
+{
+       unsigned char expa;
+       int err = 0;
+
+       if ((err = read_gpio_expa(&expa, 0x26))) {
+               printk(KERN_ERR "Error reading from I/O EXPANDER \n");
+               return err;
+       }
+
+       /* 'P6' enable/disable IRDA_TX and IRDA_RX */
+       if (state & IR_SEL) { /* IrDA */
+               if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
+                       printk(KERN_ERR "Error writing to I/O EXPANDER \n");
+                       return err;
+               }
+       } else {
+               if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
+                       printk(KERN_ERR "Error writing to I/O EXPANDER \n");
+                       return err;
+               }
+       }
+       return err;
+}
+
+static void set_trans_mode(void *data)
+{
+       int *mode = data;
+       unsigned char expa;
+       int err = 0;
+
+       if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
+               printk(KERN_ERR "Error reading from I/O expander\n");
+       }
+
+       expa &= ~0x03;
+
+       if (*mode & IR_SIRMODE) {
+               expa |= 0x01;
+       } else { /* MIR/FIR */
+               expa |= 0x03;
+       }
+
+       if ((err = write_gpio_expa(expa, 0x27)) != 0) {
+               printk(KERN_ERR "Error writing to I/O expander\n");
+       }
+}
+
+static int h3_transceiver_mode(struct device *dev, int mode)
+{
+       struct omap_irda_config *irda_config = dev->platform_data;
+
+       cancel_delayed_work(&irda_config->gpio_expa);
+       PREPARE_WORK(&irda_config->gpio_expa, set_trans_mode, &mode);
+       schedule_work(&irda_config->gpio_expa);
+
+       return 0;
+}
+
+static struct omap_irda_config h3_irda_data = {
+       .transceiver_cap        = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
+       .transceiver_mode       = h3_transceiver_mode,
+       .select_irda            = h3_select_irda,
+       .rx_channel             = OMAP_DMA_UART3_RX,
+       .tx_channel             = OMAP_DMA_UART3_TX,
+       .dest_start             = UART3_THR,
+       .src_start              = UART3_RHR,
+       .tx_trigger             = 0,
+       .rx_trigger             = 0,
+};
+
+static struct resource h3_irda_resources[] = {
+       [0] = {
+               .start  = INT_UART3,
+               .end    = INT_UART3,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device h3_irda_device = {
+       .name           = "omapirda",
+       .id             = 0,
+       .dev            = {
+               .platform_data  = &h3_irda_data,
+       },
+       .num_resources  = ARRAY_SIZE(h3_irda_resources),
+       .resource       = h3_irda_resources,
+};
+
+static struct platform_device h3_lcd_device = {
+       .name           = "lcd_h3",
+       .id             = -1,
+};
+
 static struct platform_device *devices[] __initdata = {
-       &flash_device,
+       &nor_device,
+       &nand_device,
         &smc91x_device,
        &intlat_device,
+       &h3_irda_device,
+       &h3_kp_device,
+       &h3_lcd_device,
 };
 
 static struct omap_usb_config h3_usb_config __initdata = {
@@ -171,7 +400,6 @@ static struct omap_uart_config h3_uart_config __initdata = {
 };
 
 static struct omap_lcd_config h3_lcd_config __initdata = {
-       .panel_name     = "h3",
        .ctrl_name      = "internal",
 };
 
@@ -182,11 +410,36 @@ static struct omap_board_config_kernel h3_config[] = {
        { OMAP_TAG_LCD,         &h3_lcd_config },
 };
 
+#define H3_NAND_RB_GPIO_PIN    10
+
+static int nand_dev_ready(struct nand_platform_data *data)
+{
+       return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
+}
+
 static void __init h3_init(void)
 {
-       h3_flash_resource.end = h3_flash_resource.start = omap_cs3_phys();
-       h3_flash_resource.end += OMAP_CS3_SIZE - 1;
-       (void) platform_add_devices(devices, ARRAY_SIZE(devices));
+       /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
+        * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
+        * notice whether a NAND chip is enabled at probe time.
+        *
+        * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
+        * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
+        * to avoid probing every possible flash configuration...
+        */
+       nor_resource.end = nor_resource.start = omap_cs3_phys();
+       nor_resource.end += SZ_32M - 1;
+
+       nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
+       nand_resource.end += SZ_4K - 1;
+       if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
+               nand_data.dev_ready = nand_dev_ready;
+
+       /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
+       /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
+       omap_cfg_reg(V2_1710_GPIO10);
+
+       platform_add_devices(devices, ARRAY_SIZE(devices));
        omap_board_config = h3_config;
        omap_board_config_size = ARRAY_SIZE(h3_config);
        omap_serial_init();