Merge branch 'viafb-next' of git://github.com/schandinat/linux-2.6

[pandora-kernel.git] / arch / arm / mach-msm / include / mach / msm_iomap-8x60.h

diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index a54e33b..3b19b8f 100644 (file)
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
  * Author: Brian Swetland <swetland@google.com>
  *
  * This software is licensed under the terms of the GNU General Public
@@ -35,13 +35,11 @@
  *
  */
 
-#define MSM_QGIC_DIST_BASE     IOMEM(0xF0000000)
-#define MSM_QGIC_DIST_PHYS     0x02080000
-#define MSM_QGIC_DIST_SIZE     SZ_4K
+#define MSM8X60_QGIC_DIST_PHYS 0x02080000
+#define MSM8X60_QGIC_DIST_SIZE SZ_4K
 
-#define MSM_QGIC_CPU_BASE      IOMEM(0xF0001000)
-#define MSM_QGIC_CPU_PHYS      0x02081000
-#define MSM_QGIC_CPU_SIZE      SZ_4K
+#define MSM8X60_QGIC_CPU_PHYS  0x02081000
+#define MSM8X60_QGIC_CPU_SIZE  SZ_4K
 
 #define MSM_ACC_BASE           IOMEM(0xF0002000)
 #define MSM_ACC_PHYS           0x02001000
@@ -58,51 +56,10 @@
 #define MSM_SHARED_RAM_BASE    IOMEM(0xF0100000)
 #define MSM_SHARED_RAM_SIZE    SZ_1M
 
-#define MSM_TMR_BASE           IOMEM(0xF0200000)
-#define MSM_TMR_PHYS           0x02000000
-#define MSM_TMR_SIZE           SZ_4K
+#define MSM8X60_TMR_PHYS       0x02000000
+#define MSM8X60_TMR_SIZE       SZ_4K
 
-#define MSM_TMR0_BASE          IOMEM(0xF0201000)
-#define MSM_TMR0_PHYS          0x02040000
-#define MSM_TMR0_SIZE          SZ_4K
-
-#define MSM_GPT_BASE           (MSM_TMR_BASE + 0x4)
-#define MSM_DGT_BASE           (MSM_TMR_BASE + 0x24)
-
-#define MSM_IOMMU_JPEGD_PHYS   0x07300000
-#define MSM_IOMMU_JPEGD_SIZE   SZ_1M
-
-#define MSM_IOMMU_VPE_PHYS     0x07400000
-#define MSM_IOMMU_VPE_SIZE     SZ_1M
-
-#define MSM_IOMMU_MDP0_PHYS    0x07500000
-#define MSM_IOMMU_MDP0_SIZE    SZ_1M
-
-#define MSM_IOMMU_MDP1_PHYS    0x07600000
-#define MSM_IOMMU_MDP1_SIZE    SZ_1M
-
-#define MSM_IOMMU_ROT_PHYS     0x07700000
-#define MSM_IOMMU_ROT_SIZE     SZ_1M
-
-#define MSM_IOMMU_IJPEG_PHYS   0x07800000
-#define MSM_IOMMU_IJPEG_SIZE   SZ_1M
-
-#define MSM_IOMMU_VFE_PHYS     0x07900000
-#define MSM_IOMMU_VFE_SIZE     SZ_1M
-
-#define MSM_IOMMU_VCODEC_A_PHYS        0x07A00000
-#define MSM_IOMMU_VCODEC_A_SIZE        SZ_1M
-
-#define MSM_IOMMU_VCODEC_B_PHYS        0x07B00000
-#define MSM_IOMMU_VCODEC_B_SIZE        SZ_1M
-
-#define MSM_IOMMU_GFX3D_PHYS   0x07C00000
-#define MSM_IOMMU_GFX3D_SIZE   SZ_1M
-
-#define MSM_IOMMU_GFX2D0_PHYS  0x07D00000
-#define MSM_IOMMU_GFX2D0_SIZE  SZ_1M
-
-#define MSM_IOMMU_GFX2D1_PHYS  0x07E00000
-#define MSM_IOMMU_GFX2D1_SIZE  SZ_1M
+#define MSM8X60_TMR0_PHYS      0x02040000
+#define MSM8X60_TMR0_SIZE      SZ_4K
 
 #endif